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Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
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Recently logic to enable RGMII tx delay was changed by
below patch.
"net: phy: realtek: fix enabling of the TX-delay for RTL8211F"
Based on the patch, here we are enabling the tx delay again.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
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Since TX delay is now enabled only in PHY_INTERFACE_MODE_RGMII_ID
PHY_INTERFACE_MODE_RGMII_TXID.
These change where introduced in phy driver in commit titled
"net: phy: realtek: fix enabling of the TX-delay for RTL8211F"
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
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Ethernet support on all three LS1012A platforms(FRDM, QDS and RDB) is
enabled with this patch.
eth.c files for all 3 platforms contain board ethernet initialization
function and also function to reset phy.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
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The MC boot sequence is contained in mc_env_boot. Update LS1088A boards
to use this function, and hook it to reset_phy so that it's called late
enough, after the ports have been initialized, for proper DPC / DPL
fixup.
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
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IFC-NOR and QSPI-NOR signals are muxed on SoC to save pins
Add fsl_fdt_fixup_flash()
-To disable IFC-NOR node in dts if QSPI is enabled and vice-versa
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
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Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
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The implementation of function set_pcie_ns_access() uses a wrong
argument. The structure array ns_dev has a member 'ind' which is
initialized by CSU_CSLX_*. It should use the 'ind' directly to
address the PCIe's CSL register (CSL_base + CSU_CSLX_PCIE*).
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[YS: Revise commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
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Moves IR chip (IR36021) specific code in flag to resolve
compilation issue where it is not present. For example,
LS1088A is having a new LTC3882 voltage chip.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
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This patch adds changes necessary to move functionality present in
PowerPC folders with ARM architectures that have DPAA1 QBMan hardware
- Created new board/freescale/common/portals.c to house shared device
tree fixups for DPAA1 devices with ARM and PowerPC cores
- Added new header file to top includes directory to allow files in
both architectures to grab the function prototypes
- Port inhibit_portals() from PowerPC to ARM. This function is used in
setup to disable interrupts on all QMan and BMan portals. It is
needed because the interrupts are enabled by default for all portals
including unused/uninitialised portals. When the kernel attempts to
go to deep sleep the unused portals prevent it from doing so
Signed-off-by: Ahmed Mansour <ahmed.mansour@nxp.com>
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
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Corrects the channel number passed in i2c write operation for
LTC3882 voltage regulator.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
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This patch adds the support for VID on LS1088AQDS and LS1088ARDB systems.
It reads the fusesr register and changes the VDD accordingly by adjusting the
voltage via LTC3882 regulator.
This patch also takes care of the special case of 0.9V VDD is present in
fusesr register. In that case,it also changes the SERDES voltage by disabling
the SERDES, changing the SVDD and then re-enabling SERDES.
Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
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Restructures common driver to support LTC3882 voltage regulator
chip.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
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Adds below LTC3882 voltage regulator config:
CONFIG_VOL_MONITOR_LTC3882_READ
CONFIG_VOL_MONITOR_LTC3882_SET
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
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Moves IR chip (IR36021) specific code in flag to resolve
compilation issue where it is not present. For example,
LS1088A is having a new LTC3882 voltage chip.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
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Adds a board specific API namely board_adjust_vdd which
is required to define the board VDD adjust settings.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
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Adds below voltage values supported by LS1088A Soc:
1.025 V(default), 0.9875V, 0.9750 V, 0.9V, 1.0 V, 1.0125 V, 1.0250 V
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
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Enable validation of boot.scr script prior to its execution dependent
on "secureboot" flag in environment. Enable fall back option to
nor/qspi boot in case of secure boot. Also enable "secureboot=y"
flag in environment for ARM based platforms instead of bootcmd.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Tested-by: Vinitha Pillai <vinitha.pillai@nxp.com>
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SEC must be initialised before PPA is validated, so
call sec_init() ahead of ppa_init().
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
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Validates PPA, MC, DPC, Bootscript, DPL and Kernel images in ESBC phase
using esbc_validate command. Add images validation in default environment
under mcinitcmd prior to MC initialization.
Add header address for PPA to be validated during ESBC phase for LS1088A
platform based on LAyerscape Chasis 3.
Moves sec_init prior to ppa_init as for validation of PPA sec must
be initialised before the PPA is initialised.
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
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Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
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Using changes in this patch we were able to reduce approx 8k
size of u-boot-spl.bin image. Following is breif description of
changes to reduce SPL size:
1. Changes in board/freescale/ls1088a/Makefile to remove
compilation of eth.c and cpld.c in case of SPL build.
2. Changes in board/freescale/ls1088a/ls1088a.c to keep
board_early_init_f funcations in case of SPL build.
3. Changes in ls1088a_common.h & ls1088ardb.h to remove driver
specific macros due to which static data was being compiled in
case of SPL build.
4. Enable CONFIG_SYS_DCACHE_OFF in case of SPL build as DCACHE is
not being enabled in case of SPL image but was compiled in to
add redundant code.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com
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As part of chain of trust with confidentiality along with distro
boot, linux kernel image needs to be stored in encrypted form on
ext4 boot partition. So enable CONFIG_CMD_EXT4_WRITE in case of
Secure boot.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
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As per current implemenetation, default value of board env is
based on board filename i.e ls2080ardb.
With distro support changes, this env is used to decide upon
kernel dtb which is different for other SoCs (ls2088a, ls2081a)
combination supported with this board.
Add support to modify board env based on SoC type
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
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Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
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Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
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EC1 and EC2 are RGMII interface on ls1088aqds platform.
This patch add support of RGMII with PHY and MDIO
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
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This patch adds support RGMII protocol
NXP's LDPAA2 support RGMII protocol. LS1088A is the
first Soc supporting both RGMII and SGMII.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
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This patch add support of LS1088AQDS platform.
The LS1088A QorIQTM Development System (QDS) is a
high-performance computing, evaluation, and
development platform that supports the LS1088A QorIQ Architecture
processor.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
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LS1088A is an ARMv8 implementation. The LS1088ARDB is an evaluatoin
platform that supports the LS1088A family SoCs. This patch add basic
support of the platform.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
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CoreLink Cache Coherent Interconnect (CCI) is ARM BUS which
provides full cache coherency between two clusters of multi-core
CPUs and I/O coherency for devices and I/O masters.
This patch add new CONFIG defination "FSL_SYS_HAS_CCI400" and
removes register space definaton of CCI-400 bus from
immap_ls102xa to fsl_immap, since same is defined there already
"CONFIG_SYS_CCI400_ADDR" is depricated and new SYS_CCI400_OFFSET
is introduced in Kconfig
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
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CoreLink Cache Coherent Interconnect (CCI) is ARM BUS which
provides full cache coherency between two clusters of multi-core
CPUs and I/O coherency for devices and I/O masters.
This patch add new CONFIG defination "SYS_FSL_HAS_CCI400" and
moves existing register space definaton of CCI-400 bus
from immap_lsch2 to fsl_immap, so that it can be used
for both chasis 2 and chasis 3.
"CONFIG_SYS_CCI400_ADDR" is depricated and new SYS_CCI400_OFFSET
is introduced in Kconfig
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
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Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: York Sun <york.sun@nxp.com>
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Patch makes below changes:
-Update QSPI flash type
As per updated board design,
different QSPI flash is connected on boards,
hence change QSPI flash type from
Micron n25q512a device to spansion s25fs512s
device in dts and config.
-Update QIXIS_QMAP_MASK value from 0x07 to 0x70
-Update checkboard()
display of boot source and board information
-Correct DSPI flash config selection
-Remove deprecated config : CONFIG_DISPLAY_BOARDINFO_LATE
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
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IFC and QSPI are muxed on board.
Add fsl_fdt_fixup_flash()
-To disable IFC node in dts if QSPI is enabled.
-Or disable QSPI node in dts if IFC is enabled.
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
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Validates the images in the ESBC phase for LS2088ARDB platform
and QSPI boot using esbc_validate command. Add images validation
in default environment under mcinitcmd prior to MC initialization.
Adds header address for PPA to be validated during ESBC phase for
ARCH_LS2088 and QSPI_BOOT.
Moves sec_init prior to ppa_init as for validation of PPA sec must
be initialised before the PPA is initialised.
Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com>
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
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config_board_mux() is dependent on 'hwconfig' env read value.
For some bootloaders like QSPI, env is ready only after
relocation. So delay execution of config_board_mux()
to misc_init_r().
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
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Update the default core frequency to 1800MHZ for best performance under
SD boot and eMMC boot.
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
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LS2080ARDB/LS2088ARDB updated RevF boards do not have
smart voltage translator, so no need to program GPIO
for LS2088ARDB boards
The GPIO programming is required only for LS2081ARDB.
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
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Cc: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
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It's been a while since I've touched U-Boot on the Raspberry Pi and
other things have been taking my time. Drop my maintainership for this
port.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
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CS Systemes d'Information (CSSI) manufactures two boards, named MCR3000
and CMPC885 which are respectively based on MPC866 and MPC885 processors.
This patch adds support for the first board.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
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AVR32 is gone. It's already more than two years for no support in Buildroot,
even longer there is no support in GCC (last version is heavily patched 4.2.4).
Linux kernel v4.12 got rid of it (and v4.11 didn't build successfully).
There is no good point to keep this support in U-Boot either.
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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The 82xx board mgcoge3ne was removed from the codebase, so this is dead
code.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
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Implement spl_start_uboot to let Falcon mode work.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Acked-by: Heiko Schocher <hs@denx.de>
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There was for long time no activity in the 4xx area.
We need to go further and convert to Kconfig, but it
turned out, nobody is interested anymore in 4xx,
so remove it.
Signed-off-by: Heiko Schocher <hs@denx.de>
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