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2017-05-08Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini
2017-05-08ARM: keystone2: Add support for getting external clock dynamicallyLokesh Vutla
One some keystone2 platforms like K2G ICE, there is an option to switch between 24MHz or 25MHz as sysclk. But the existing driver assumes it is always 24MHz. Add support for getting all reference clocks dynamically by reading boot pins. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-08ARM: k2g: Add support for dynamic programming of PLL based on SYSCLKLokesh Vutla
K2G supports various sysclk frequencies which can be determined using sysboot pins. PLLs should be configured based on this sysclock frequency. Add PLL configurations for all supported sysclk frequencies. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-08board: ti: Define Kconfig symbol for common cmd optionsLokesh Vutla
Instead of defining command options in every defconfig, define a common Kconfig symbol that consolidates all command options that are supported by any TI platform. Also use imply keyword so that that specific option can be disabled if not required. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-08igep003x: Add support for IGEP SMARC AM335xPau Pajuelo
The IGEP SMARC AM335x is an industrial processor module with following highlights: o AM3352 TI processor (Up to AM3359) o Cortex-A8 ARM CPU o SMARC form factor module o Up to 512 MB DDR3 SDRAM / 512 MB FLASH o WiFi a/b/g/n and Bluetooth v4.0 on-board o Ethernet 10/100/1000 Mbps and 10/100 Mbps controller on-board o JTAG debug connector available o Designed for industrial range purposes Signed-off-by: Pau Pajuelo <ppajuelo@iseebcn.com> Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Tested-by: Pau Pajuelo <ppajuel@gmail.com>
2017-05-08igep003x: UBIizeLadislav Michl
Convert IGEP board to use UBI volumes for U-Boot, its environment and kernel. With exception of first four sectors read by SoC BootROM whole NAND is UBI managed. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Reviewed-by: Heiko Schocher<hs@denx.de> Tested-by: Pau Pajuelo <ppajuel@gmail.com>
2017-05-08igep0033: Rename to igep003xLadislav Michl
Rename igep0033 to igep003x as IGEP SMARC AM335x module (igep0034) can use the same source files. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Tested-by: Pau Pajuelo <ppajuel@gmail.com>
2017-05-08stm32f7: stm32f746-disco: read memory info from device treeVikas Manocha
Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08stm32f746: to switch on user LED1 & read user buttonVikas Manocha
All discovery boards have one user button & one user LED. Here we are just reading the button status & switching ON the user LED. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08stm32f7: use stm32f7 gpio driver supporting driver modelVikas Manocha
With this gpio driver supporting DM, there is no need to enable clocks for different gpios (for pin muxing) in the board specific code. Need to increase the allocatable area required before relocation from 0x400 to 0xC00 becuase of 10 new gpio devices(& new gpio class) added in device tree. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-08stm32f7: use clock driver to enable sdram controller clockVikas Manocha
This patch also removes the sdram/fmc clock enable from board specific code. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08stm32f7: use driver model for sdram initializationVikas Manocha
As driver model takes care of pin control configuraion, this patch also removes the sdram/fmc pin configuration. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08stm32f7: sdram: move sdram driver code to ram drivers areaVikas Manocha
Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08arm: am57xx: cl-som-am57x: invoke clock API to enable/disable clocksUri Mashiach
Invoke enable_usb_clocks during board_usb_init and disable_usb_clocks during board_usb_exit to enable and disable clocks respectively. Modifications: * Enable USB clocks in the OMAP version of the function board_usb_init. * Disable USB clocks in the OMAP version of the function board_usb_cleanup. Cc: Marek Vasut <marex@denx.de> Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-08usb: host: xhci-omap: fix double weak board_usb_init functionsUri Mashiach
A weak version of the function board_usb_init is implemented in: common/usb.c drivers/usb/host/xhci-omap.c To fix the double implementations: * Convert the board_usb_init function in drivers/usb/host/xhci-omap.c normal (not weak). * The function board_usb_init in drivers/usb/host/xhci-omap.c calls to the weak function omap_xhci_board_usb_init. * Rename board version of the function board_usb_init to omap_xhci_board_usb_init. Done only for boards that defines CONFIG_USB_XHCI_OMAP. To achieve the same flexibility with the function board_usb_cleanup: * Add a normal (not weak) implementation of the function board_usb_cleanup in drivers/usb/host/xhci-omap.c * The function board_usb_cleanup in drivers/usb/host/xhci-omap.c calls to the weak function omap_xhci_board_usb_cleanup. * Rename board version of the function board_usb_cleanup to omap_xhci_board_usb_cleanup. Done only for boards that defines CONFIG_USB_XHCI_OMAP. Cc: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Roger Quadros <rogerq@ti.com>
2017-05-05board/BuR/common: incorrect check of dtbxypron.glpk@gmx.de
The logical expression to check the dtb is incorrect in load_devicetree. The problem was indicated by cppcheck. The inconsistent variable name dtppart is changed to dtbpart. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Hannes Schmelzer <oe5hpm@oevsv.at> Acked-by: Hannes Schmelzer <oe5hpm@oevsv.at>
2017-05-04sunxi: add support for Banana Pi M2 Plus boardIcenowy Zheng
Banana Pi M2 Plus is an Allwinner H3-based SBC by Sinovoip, which has already mainline device tree file that have landed into U-Boot source tree. Add a defconfig file for it and add the MAINTAINERS items. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@openedev.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-05-02ARM: sunxi: move board/sunxi/Kconfig to arch/arm/mach-sunxi/KconfigMasahiro Yamada
For the consistent location of SoC-level Kconfig. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-05-01odroid-c2: README: MMC is supportedxypron.glpk@gmx.de
Mention eMMC and microSD as supported devices. They have been enabled with patch d0c5c8d529f16fa88ab52a3b5dd2d4fc03664f19 odroid-c2: enable new Meson GX MMC driver in board defconfig which was accepted for u-boot-mmc.git. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-05-01warp7: MAINTAINERS: Add warp7_secure_defconfig entryFabio Estevam
Add warp7_secure_defconfig entry to avoid the following warning: WARNING: no maintainers for 'warp7_secure' Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-04-30Convert CONFIG_CMD_BLOB to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_BLOB Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Add imply CMD_BLOB under CHAIN_OF_TRUST] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-04-30Convert CONFIG_CMD_BAT to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_CMD_BAT Signed-off-by: Simon Glass <sjg@chromium.org>
2017-04-30power: Drop CONFIG_I2C_PMICSimon Glass
This is only used by one board and should not be a CONFIG option. Instead it should use the driver model pmic framework. For now, just move the setting into the only board that uses it. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-04-28sunxi: video: Add A64/H3/H5 HDMI driverJernej Skrabec
This commit adds support for HDMI output. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-28sunxi: Enable DM_I2C for A64/H3/H5Jernej Skrabec
This commits enable DM I2C support for A64/H3/H5 SoCs. It is not enabled globaly for all sunxi SoCs, because some boards use PMICs which are connected through I2C. In order to keep same functionality, PMIC drivers needs to be ported to DM too. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-28sunxi: i2c: Add support for DM I2CJernej Skrabec
This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-28sunxi: Move function for later convenienceJernej Skrabec
This commit only moves i2c_init_board() function almost to the top and doesn't have any functional changes. This is needed for a temporary workaround in next commit when support for DM I2C will be introduced. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-27board: dra71: Fix selection of OPPsLokesh Vutla
As per the DM[1] Dated June 2016–Revised February 2017, Table 5-3, DRA71 supports the following OPPs for various voltage domains: VDD_MPU: OPP_NOM VDD_CORE: OPP_NOM VDD_GPU: OPP_NOM VDD_DSPEVE: OPP_NOM, OPP_HIGH VDD_IVA: OPP_NOM, OPP_HIGH This patch add support for selection of the above OPPs instead of using OPP_NOM for all voltage domains. [1] http://www.ti.com/lit/ds/symlink/dra718.pdf Reported-by: Vishal Mahaveer <vishalm@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-04-25Merge git://git.denx.de/u-boot-sunxiTom Rini
2017-04-25Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
2017-04-25arm: socfpga: add cyclone5 based de10-nano boardDalon Westergreen
Add support for the Terasic DE10-Nano board. The board is based on the DE0-Nano-Soc board but adds a larger FPGA and an HDMI output. Signed-off-by: Dalon Westergreen <dwesterg@gmail.com> Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
2017-04-24armv8: layerscape: Fix DDR size calcuation for SPL buildYork Sun
Commit 088454cd dropped return value from initram(), setting gd->ram_size directly. Three boards were missed for SPL boot. Signed-off-by: York Sun <york.sun@nxp.com>
2017-04-24armv8: ls1046aqds: Integrate FSL PPAHou Zhiqiang
The PPA is a EL3 firmware, which support PSCI, hotplug, power-management features etc. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-24armv8: ls1043aqds: Integrate FSL PPAHou Zhiqiang
The PPA is a EL3 firmware, which support PSCI, hotplug, power-management features etc. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-24armv8: ls2080ardb: Add phy number for serdes1 protocol 0x4bSantan Kumar
Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-24arm: ls1021atwr: Enable RGMII TX/RX clock internal delay for AR8033Alison Wang
Since commit ce412b7, RGMII TX clock internal delay is not enabled for AR8033 unconditionally. On LS1021ATWR board, the third port eTSEC3 uses AR8033 in RGMII mode. The TX/RX internal delay needs to be enabled. This patch will set PHY_INTERFACE_MODE_RGMII_ID to enable RGMII TX/RX clock internal delay for AR8033 on the third port. Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-04-21sunxi: add support for Lichee Pi ZeroIcenowy Zheng
Lichee Pi Zero is a development board with a V3s SoC, which features 64MiB DRAM co-packaged within the SoC, a TF slot, a SPI NOR slot (not soldered in production batch), a 40-pin RGB LCD connector and some extra pins available as 2.54mm pins or stamp holes. Add support for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-21sunxi: add basic V3s supportIcenowy Zheng
Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-20sunxi: Add clock support for DE2/HDMI/TCON on newer SoCsJernej Skrabec
This is needed for HDMI, which will be added later. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-20sunxi: Add support for Bananapi M2 UltraChen-Yu Tsai
The Bananapi M2 Ultra is the first publicly available development board featuring the R40 SoC. This patch add barebone dtsi/dts files for the R40 and Bananapi M2 Ultra, as well as a defconfig for it. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-20sunxi: Add PSCI support for R40Chen-Yu Tsai
The R40's CPU controls are a combination of sun6i and sun7i. All controls are in the CPUCFG block, and it seems the R40 does not have a PRCM block. The core reset, power gating and clamp controls are grouped like sun6i. Last, the R40 does not have a secure SRAM block. This patch adds a PSCI implementation for CPU bring-up and hotplug for the R40. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-20sunxi: Enable SPL for R40Chen-Yu Tsai
Now that we can do DRAM initialization for the R40, we can enable SPL support for it. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-20sunxi: Provide defaults for R40 DRAM settingsChen-Yu Tsai
These values were taken from the Banana Pi M2 Ultra fex file found in the released vendor BSP. This is the only publicly available R40 device at the time of this writing. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-20sunxi: Add mmc[1-3] pinmux settings for R40Chen-Yu Tsai
The PIO is generally compatible with the A20, except that it routes the full 8 bits and eMMC reset pins for mmc2. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-20sunxi: Enable AXP221s in I2C mode with the R40 SoCChen-Yu Tsai
The R40 SoC uses the AXP221s in I2C mode to supply power. Some regulator's common usages have changed, and also the recommended voltage for existing usages have changed. Update the defaults to match. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-20sunxi: Add initial support for R40Chen-Yu Tsai
The R40 is the successor to the A20. It is a hybrid of the A20, A33 and the H3. The R40's PIO controller is compatible with the A20, Reuse the A20 UART and I2C muxing code by adding the R40's macro. The display pipeline is the newer DE 2.0 variant. Block enabling video on R40 for now. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-20sunxi: Split up long Kconfig linesChen-Yu Tsai
Currently we have some lines in board/sunxi/Kconfig that are very long. These line either provide default values for a set of SoCs, or limit some option to a subset of sunxi SoCs. Fortunately Kconfig makes it easy to split them. The Kconfig language document states If multiple dependencies are defined, they are connected with '&&'. This means we can split existing dependencies at "&&" symbols. This applies to both the "depends on" lines and "if" expressions. This patch splits them up to one symbol per line. This will make it easier to add, remove, or modify one item at a time. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-20sunxi: Convert CONFIG_MACPWR to KconfigMylène Josserand
Convert the CONFIG_MACPWR to Kconfig and update all the sunxi defconfigs that used it in SYS_EXTRA_OPTIONS. Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-20sunxi: Convert CONFIG_SATAPWR to KconfigMylène Josserand
Convert the CONFIG_SATAPWR into kconfig. Thanks to that, many SYS_EXTRA_OPTIONS can be removed from some defconfigs. Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-18Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini