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Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
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Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
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Signed-of-by: Sergei Poselenov <sposelenov@emcraft.com>
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Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
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Some TQM85xx boards could be equipped with up to 1 GiB (NOR) Flash
memory. The current memory map only supports up to 128 MiB Flash.
This patch adds the configuration option CONFIG_TQM_BIGFLASH. If
set, up to 1 GiB flash is supported. To achieve this, the memory
map has to be adjusted in great parts (for example the CCSRBAR is
moved from 0xE0000000 to 0xA0000000).
If you want to boot Linux with CONFIG_TQM_BIGFLASH set, the new
memory map also has to be considered in the kernel (changed
CCSRBAR address, changed PCI IO base address, ...). Please use
an appropriate Flat Device Tree blob (tqm8548.dtb).
Signed-off-by: Martin Krause <martin.krause@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
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This patch adds support for NAND FLASH on the TQM8548. It is disabled by
default and can be enabled for the TQM8548 modules. It is now based on
the re-written FSL NAND UPM driver. A patch has been posted earlier today
with the subject:
"NAND FSL UPM: driver re-write using the hwcontrol callback"
Note that the R/B pin is not supported by that module requiring to use
the specified maximum delay time.
Note: With NAND support enabled the size of the U-Boot image exceeds
256 KB and TEXT_BASE must therefore be set to 0xfff80000 in config.mk,
doubling the image size :-(.
Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
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This patch adds support for PCI express cards. The board support
now uses common FSL PCI init code, for both, PCI and PCIe on all
TQM85xx modules.
Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
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This patch adds basic support for the TQM8548 module from TQ-Components
(http://www.tqc.de/) including DDR2 SDRAM initialisation and support for
eTSEC 3 and 4
Furthermore Flash buffer write has been enabled to speed up output to
the Flash by approx. a factor of 10.
Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
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This patch adds support for Linux kernels using the Flat Device Tree.
It also re-defines the default environment settings for booting Linux
with the FDT blob.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
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This patch adds initialization of the UPMC RAM to support up to two
Intel 82527 compatible CAN controller on the TQM85xx modules.
Signed-off-by: Thomas Waehner <thomas.waehner@tqs.de>
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
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The CS0_BNDS register is now set according to the detected
memory size.
Signed-off-by Martin Krause <martin.krause@tqs.de>
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This patch fixes the re-calculation of the automatic chip select
configuration for boards with two populated FLASH banks.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
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Do not configure port pins PD30/PD31 as SCC1 TxD/RxD except for the TQM8560
board. On the other TQM85xx boards (TQM8541 and TQM8555) SCC1 is not used
as serial interface anyway. Worse, on some board variants configuring the
pins for SCC1 leads to short circuits (for example on the TQM8541-BG).
Signed-off-by: Martin Krause <martin.krause@tqs.de>
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Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
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The submitted patch seems to have been more up-to-date, but an older patch was
already in the repository. This patch encompasses the differences
Taken entirely from Sergei Poselenov <sposelenov@emcraft.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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Move all TQM board directories to the vendor specific directory "tqc"
for modules from TQ-Components GmbH (http://www.tqc.de).
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
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Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
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This patch gets rid of the spi_chipsel table and adds a handful of new
functions that makes the SPI layer cleaner and more flexible.
Instead of the spi_chipsel table, each board that wants to use SPI
gets to implement three hooks:
* spi_cs_activate(): Activates the chipselect for a given slave
* spi_cs_deactivate(): Deactivates the chipselect for a given slave
* spi_cs_is_valid(): Determines if the given bus/chipselect
combination can be activated.
Not all drivers may need those extra functions however. If that's the
case, the board code may just leave them out (assuming they know what
the driver needs) or rely on the linker to strip them out (assuming
--gc-sections is being used.)
To set up communication parameters for a given slave, the driver needs
to call spi_setup_slave(). This returns a pointer to an opaque
spi_slave struct which must be passed as a parameter to subsequent SPI
calls. This struct can be freed by calling spi_free_slave(), but most
driver probably don't want to do this.
Before starting one or more SPI transfers, the driver must call
spi_claim_bus() to gain exclusive access to the SPI bus and initialize
the hardware. When all transfers are done, the driver must call
spi_release_bus() to make the bus available to others, and possibly
shut down the SPI controller hardware.
spi_xfer() behaves mostly the same as before, but it now takes a
spi_slave parameter instead of a spi_chipsel function pointer. It also
got a new parameter, flags, which is used to specify chip select
behaviour. This may be extended with other flags in the future.
This patch has been build-tested on all powerpc and arm boards
involved. I have not tested NIOS since I don't have a toolchain for it
installed, so I expect some breakage there even though I've tried
fixing up everything I could find by visual inspection.
I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and
DataFlash drivers posted as a follow-up. I'd like some help testing
other boards that use the existing SPI API.
But most of all, I'd like some comments on the new API. Is this stuff
usable for everyone? If not, why?
Changed in v4:
- Build fixes for various boards, drivers and commands
- Provide common struct spi_slave definition that can be extended by
drivers
- Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate
- Make default bus and mode build-time configurable
- Override default SPI bus ID and mode on mx32ads and imx31_litekit.
Changed in v3:
- Add opaque struct spi_slave for controller-specific data associated
with a slave.
- Add spi_claim_bus() and spi_release_bus()
- Add spi_free_slave()
- spi_setup() is now called spi_setup_slave() and returns a
struct spi_slave
- soft_spi now supports four SPI modes (CPOL|CPHA)
- Add bus parameter to spi_setup_slave()
- Convert the new i.MX32 SPI driver
- Convert the new MC13783 RTC driver
Changed in v2:
- Convert the mpc8xxx_spi driver and the mpc8349emds board to the
new API.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Tested-by: Guennadi Liakhovetski <lg@denx.de>
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Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
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This cleans up the SDRAM initialization and related code a bit, and
allows faster booting.
* Add definitions for EBI and internal SRAM to asm/arch/memory-map.h
* Remove memory test from sdram_init() and make caller responsible
for verifying the SDRAM and determining its size.
* Remove base_address member from struct sdram_config (was sdram_info)
* Add data_bits member to struct sdram_config and kill CFG_SDRAM_16BIT
* Add support for a common STK1000 hack: 16MB SDRAM instead of 8.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
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Since the reset vector is always aligned to a very large boundary, we
can save a couple of KB worth of alignment padding by placing the
exception vectors at the same address.
Deciding which one it is is easy: If we're handling an exception, the
CPU is in Exception mode. If we're starting up after reset, the CPU is
in Supervisor mode. So this adds a very minimal overhead to the reset
path (only executed once) and the exception handling path (normally
never executed at all.)
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
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Rework the HMATRIX configuration interface so that it becomes easier
to configure the HMATRIX for boards with special needs, and add new
parts.
The HMATRIX header file has been split into a general,
chip-independent part with register definitions, etc. and a
chip-specific part with SFR bitfield definitions and master/slave
identifiers.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
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This is a replacement for ATSTK1002 with 64MB SDRAM and NAND flash on
board. It's currently in production and will be available soon.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
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The .flashprog section was only needed back when we were running
directly from flash, and it's even more useless on NGW100 since it
uses the CFI flash driver which never used this workaround in the
first place.
Remove it on STK1000 as well, and get rid of all the associated code and
annotations.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
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Merge branch 'testing-V2'
Conflicts:
board/atmel/at91cap9adk/Makefile
Fixing copyright
board/atmel/at91sam9260ek/Makefile
Fixing copyright
board/atmel/at91sam9260ek/u-boot.lds
Delete no more needed ld script
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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introduced by 53677ef18 "Big white-space cleanup."
Signed-off-by: Wolfgang Denk <wd@denx.de>
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Reuse the existing DIU driver in board/freescale/common.
Signed-off-by: York Sun <yorksun@freescale.com>
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Add DIU and cfb console support to FSL 5121ADS board.
Use #define CONFIG_VIDEO in config file to enable fb console.
Signed-off-by: York Sun <yorksun@freescale.com>
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Remove DPRINTF macro and replace it with generic debug macro.
Signed-off-by: York Sun <yorksun@freescale.com>
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The clock divider has different format in 5121 and 8610. This patch moves it to
board specific code.
Signed-off-by: York Sun <yorksun@freescale.com>
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This commit gets rid of a huge amount of silly white-space issues.
Especially, all sequences of SPACEs followed by TAB characters get
removed (unless they appear in print statements).
Also remove all embedded "vim:" and "vi:" statements which hide
indentation problems.
Signed-off-by: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
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When SATA is selected (via jumper J6) we need to disable the first PCIe
node in the device tree, so that Linux doesn't initialize it. Otherwise
the Linux SATA driver will fail to detect the devices.
The same goes the other way around too. So if PCIe is selected we need
to disable the SATA node in the device tree.
This is because PCIe port 0 and SATA on 460EX share the same pins
(multiplexed) and we have to configure in U-Boot which peripheral is
enabled.
Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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flash.c:593: warning: dereferencing type-punned pointer will break strict-aliasing rules
flash.c:398: error: label at end of compound statement
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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...and add to MAKEALL script
Signed-off-by: Wolfgang Denk <wd@denx.de>
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Several board/<...>/config.mk files include dynamically built (by
the Makefile) config files but used the wrong file name of
$(TOPDIR)/board/$(BOARDDIR)/config.tmp
instead if the correct
$(OBJTREE)/board/$(BOARDDIR)/config.tmp
The bug is nasty because the build result is correct for the (normal)
in-tree builds, and because 'sinclude' is used no errors get raised
even for out-of-tree build tests. But out-of-tree builds use an
incomplete and thus usually incorrect configuration...
Signed-off-by: Wolfgang Denk <wd@denx.de>
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This patch fixes the canyonlands config.mk file to enable correct
out-of-tree builds. Thanks to Wolfgang Denk for spotting this.
Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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