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ddr
Age
Commit message (
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Author
2009-02-17
fsl-ddr: Allow system to boot if we have more than 4G of memory
Kumar Gala
2009-02-17
fsl-ddr: ignore memctl_intlv_ctl setting if only one DDR controller
Kumar Gala
2009-01-23
fsl-ddr: use the 1T timing as default configuration
Dave Liu
2009-01-23
fsl-ddr: make the self refresh idle threshold configurable
Dave Liu
2009-01-23
fsl-ddr: clean up the ddr code for DDR3 controller
Dave Liu
2009-01-23
fsl-ddr: update the bit mask for DDR3 controller
Dave Liu
2008-12-04
fsl ddr skip interleaving if not supported.
Ed Swarthout
2008-10-18
Add debug information for DDR controller registers
Haiying Wang
2008-10-18
Check DDR interleaving mode
Haiying Wang
2008-10-18
Pass dimm parameters to populate populate controller options
Haiying Wang
2008-10-18
Make DDR interleaving mode work correctly
Haiying Wang
2008-10-18
rename CFG_ macros to CONFIG_SYS
Jean-Christophe PLAGNIOL-VILLARD
2008-09-13
Coding style cleanup, update CHANGELOG
Wolfgang Denk
2008-09-06
Fix compiler warning in mpc8xxx ddr code
Kumar Gala
2008-08-27
FSL DDR: Add DDR2 DIMM paramter support
Kumar Gala
2008-08-27
FSL DDR: Add DDR1 DIMM paramter support
Kumar Gala
2008-08-27
FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code.
Kumar Gala