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ddr
Age
Commit message (
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Author
2016-10-07
Various, accumulated typos collected from around the tree.
Robert P. J. Day
2016-09-26
Merge git://git.denx.de/u-boot-fsl-qoriq
Tom Rini
2016-09-26
driver: ddr: fsl_mmdc: Pass board parameters through data structure
York Sun
2016-09-23
drivers: squash lines for immediate return
Masahiro Yamada
2016-09-14
ddr: fsl: fix a compile issue
Shaohui Xie
2016-09-14
driver/ddr/fsl: Add general MMDC driver and reuse common MMDC driver for ls1012a
Shengzhou Liu
2016-09-14
driver/ddr/fsl: Revise workaround A008511 for A009803
York Sun
2016-09-14
driver/ddr/fsl: Add more debug registers
York Sun
2016-08-02
driver/ddr/fsl: Fix timing_cfg_2
York Sun
2016-07-16
Various, unrelated tree-wide typo fixes.
Robert P. J. Day
2016-06-03
driver/ddr/fsl: Check condition for erratum A-009803
Shengzhou Liu
2016-06-03
drivers/ddr/fsl: Disabling data init if ECC is not enabled
York Sun
2016-06-03
drivers/ddr/fsl: Fix timing_cfg_2 register
York Sun
2016-06-03
drivers/ddr/fsl: Update clk_adjust of sdram_clk_cntl
Shengzhou Liu
2016-05-24
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
Tom Rini
2016-05-20
arm: mvebu: a38x: Weed out floating point use
Marek Vasut
2016-05-18
driver/ddr/fsl: Add workaround for erratum A-010165
Shengzhou Liu
2016-05-17
driver/ddr/fsl: Add workaround for erratum A-009801
Shengzhou Liu
2016-05-17
drivers/ddr/fsl: update workaround for erratum A-008511
Shengzhou Liu
2016-05-02
Fix spelling of "occurred".
Vagrant Cascadian
2016-04-20
ddr: altera: Repair DQ window centering code
Marek Vasut
2016-04-20
ddr: altera: Staticize global variables
Marek Vasut
2016-04-20
ddr: altera: Make DLEVEL behavior inclusive
Marek Vasut
2016-04-20
ddr: altera: Zero DM IN delay in scc_mgr_zero_group()
Marek Vasut
2016-04-20
ddr: altera: Remove unnecessary ODT mode config
Marek Vasut
2016-04-20
ddr: altera: Remove unnecessary update of the SCC
Marek Vasut
2016-04-20
ddr: altera: Fix DRAM end value in protection rule
Marek Vasut
2016-04-20
ddr: altera: Fix scc_mgr_set() argument order
Marek Vasut
2016-04-20
ddr: altera: Tweak DQS tracking enable handling
Marek Vasut
2016-04-20
ddr: altera: Replace ad-hoc constant with macro
Marek Vasut
2016-03-27
Fix typo choosen in comments and printf logs
Alexander Merkle
2016-03-24
arm: mvebu: Fix ddr3_init() cpu config
Dirk Eibach
2016-03-21
driver/ddr/fsl: Add workaround for erratum A-009803
Shengzhou Liu
2016-03-21
driver/ddr/fsl: Add address parity support for DDR4 UDIMM/discrete
Shengzhou Liu
2016-02-06
Use correct spelling of "U-Boot"
Bin Meng
2016-02-01
drivers: ddr: Add DDR2 SDRAM controller driver for Microchip PIC32.
Purna Chandra Mandal
2016-01-25
drivers/ddr/fsl: fsl_ddr_sdram_size remove unused controllers
Ed Swarthout
2016-01-25
driver/ddr/fsl: Add workaround for A009663
Shengzhou Liu
2016-01-25
fsl/ddr: Add workaround for ERRATUM_A009942
Shengzhou Liu
2016-01-19
Add more SPDX-License-Identifier tags
Tom Rini
2016-01-16
ddr: altera: Init the rule ID in debug code
Marek Vasut
2016-01-14
mvebu: axp: Rename MV_DDR_32BIT to CONFIG_DDR_32BIT
Phil Sutter
2016-01-14
axp: Fix debugging support in DDR3 write leveling
Phil Sutter
2016-01-14
arm: mvebu: Make ECC support configurable on Armada XP
Stefan Roese
2016-01-14
arm: mvebu: ddr: Fix compilation warning
Stefan Roese
2015-12-15
move erratum a008336 and a008514 to soc specific file
Yao Yuan
2015-12-14
fsl/ddr: updated ddr errata-A008378 for arm and power SoCs
Shengzhou Liu
2015-12-14
driver/ddr/fsl: Update timing config for heavy load
York Sun
2015-12-14
driver/ddr/fsl: Update workaround for A008511 for vref range
York Sun
2015-12-14
driver/ddr/fsl: Update MR5 RTT park
York Sun
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