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path: root/drivers/mtd
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2017-07-18sf: add ADDR_4B for 4byte address supportSuresh Gupta
Some new flash don't support bar register but use 4bytes address to support exceed 16MB flash size. So add flash flag: ADDR_4B for some flash which support 4bytes address. Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
2017-07-18sf: Fix s25fs512s erase size and remove SECT_4K flagSuresh Gupta
As per data sheet, S25FS512S support Uniform sector option or erase size of 256 kbytes and Page Programming buffer of 256 or 512 Bytes. So, flag SECT_4K have no significance for this flash. Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
2017-06-23mtd: OneNAND: Fix onenand_block_markbadLadislav Michl
commit dfe64e2c89731a3f9950d7acd8681b68df2bae03 Author: Sergey Lapin <slapin@ossfans.org> Date: Mon Jan 14 03:46:50 2013 +0000 mtd: resync with Linux-3.7.1 modified onenand_block_markbad to call mtd_block_markbad, but as _block_markbad function pointer used by mtd_block_markbad to do actual job is by default pointing back to onenand_block_markbad there is no way this function ever finishes its job. Fix it by changing function body according current (4.12-rc6) linux implementation. Tested on IGEPv2 board with Muxed OneNAND(DDP) 512MB containing several unerasable blocks this function marked bad. Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
2017-06-23onenand_spl_simple: Add DDP OneNAND supportLadislav Michl
Current implementation is unable to access second half of DDP OneNAND flash (reads first half mirrored). Use block and bufferram address calculations from onenand_base to fix this. Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
2017-06-23onenand_spl_simple: Call onenand_spl_get_geometry() only onceLadislav Michl
Do not call onenand_spl_get_geometry() for each block read. Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
2017-06-20arm: zynq: Move CONFIG_SF_DUAL_FLASH to defconfigMike Looijmans
Move the only use of CONFIG_SF_DUAL_FLASH to defconfig. This makes the associated topic_miamiplus.h header obsolete, so remove that as well. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-16powerpc, 5xxx, 512x: remove support for mpc5xxx and mpc512xHeiko Schocher
There was for long time no activity in the mpx5xxx area. We need to go further and convert to Kconfig, but it turned out, nobody is interested anymore in mpc5xxx, so remove it. Signed-off-by: Heiko Schocher <hs@denx.de>
2017-06-16treewide: remove unneeded semicolonsMasahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-06-05samsung: nand: Drop s3c2410_nand driverSimon Glass
This is not used anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01dm: sandbox: spi: Convert driver to support livetreeSimon Glass
Update this driver to support a live device tree. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01dm: spi-flash: Convert uclass to livetreeSimon Glass
Update the SPI flash uclass to support a live device tree. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01fdt: Rename a few functions in fdt_supportSimon Glass
These two functions have an of_ prefix which conflicts with naming used in of_addr. Rename them: fdt_read_number fdt_support_bus_default_count_cells Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01dm: gpio: Add live tree supportSimon Glass
Add support for requesting GPIOs with a live device tree. This involves adjusting the function signature for the legacy function gpio_request_by_name_nodev(), so fix up all callers. Signed-off-by: Simon Glass <sjg@chromium.org> Fixes to stm32f746-disco.c: Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-09fix: nand: pxa3xx: Remove hardcode values from the driverKonstantin Porotchkin
Obtain NAND controller setup parameters from the device tree instead of using hardcoded values. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Scott Wood <oss@buserror.net> Cc: Stefan Roese <sr@denx.de> Cc: Igal Liberman <igall@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2017-05-08mtd: nand: Consolidate nand spl loaders implementationLadislav Michl
nand_spl_load_image implementation was copied over into three different drivers and now with nand_spl_read_block used for ubispl situation gets even worse. For now use least intrusive solution and #include the same implementation to nand drivers. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Tested-by: Pau Pajuelo <ppajuel@gmail.com>
2017-04-18drivers: remove Blackfin specific driversMasahiro Yamada
These drivers have no user since commit ea3310e8aafa ("Blackfin: Remove"). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
2017-04-13mtd: nand: atmel: use another functions to set gpio valueWenyou Yang
Because there isn't the implementation of gpio_set/get_value() and gpio_set/get_value() after the at91 gpio driver is converted to support the driver model, use at91_set_gpio_value() and at91_get_gpio_value() Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-04-09mtd: nand: am335x_spl_bch: Incorporate tWB delay in nand_command functionCooper Jr., Franklin
Various commands to NAND flash results in the NAND flash becoming busy. For those commands the SoC should wait until the NAND indicates it is no longer busy before sending further commands. However, there is a delay between the time the SoC sends its last command and when the NAND flash sets its Ready/Busy Pin. This delay (tWB) must be respected or the SoC may falsely assume the flash is ready when in reality it just hasn't had enough time to indicate that it is busy. Properly delaying by tWB is already done for nand_command/nand_command_lp in nand_base.c including the version of it in the Linux kernel. Therefore, this patch brings the handling of tWB delay inline to nand_base.c Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> [trini: Reformat comments slightly] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-04-07nand: sunxi: Add options for the SPL NAND configurationMaxime Ripard
The SPL image needs to be built with a different ECC configuration than the U-Boot binary. Add Kconfig options with defaults to provide a value that should work for anyone, but is still configurable if needs be. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Scott Wood <oss@buserror.net> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-04-07mtd: sunxi: Change U-Boot offsetMaxime Ripard
The default U-Boot offset for the Allwinner SoCs was set to 32kB. This was probably to try to maintain some compatibility with the current image that we build for the MMC where the U-Boot binary is also located at a 32kB offset. However, this causes a number of issues. The first one is that it prevents us from using a backup SPL entirely, which is troublesome in case where the first would be corrupt (especially on MLC which have a higher number of bitflips). We also cannot use the original MMC image on the NAND, because we need to prepare the SPL image to include the ECCs and randomizer settings, which reduces the interest of setting it at that particular offset. It also prevents us from upgrading and flashing the U-Boot and SPLs independantly, since it's very likely that it will fall in the same erase block. Since that default wasn't used by any board, change it for 8MB, which will be in an erase block of its own, all the erase blocks being multiple of two. The highest erase block size we encountered is 4MB, which means that in this particular setup, the first and second erase blocks will be for the SPL and its backup, and the third for U-Boot. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-04-07mtd: sunxi: Select the U-Boot location config optionMaxime Ripard
We'll need that symbol so that the default offset are defined Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-04-07mtd: ubi: Select RBTREE option from MTD_UBI Kconfig entryBoris Brezillon
Expose the RBTREE feature through Kconfig and select this option from the MTD_UBI option. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Jagan Teki <jagan@openedev.com> [Rebased on master] Signed-off-by: Jagan Teki <jagan@openedev.com>
2017-04-07nand: sunxi: Fix modulo by zero errorMaxime Ripard
When trying to autodetect the ECC and randomization configurations, the driver starts with a randomization disabled and no seeds. In this case, the number of seeds is obviously 0, and the randomize boolean is set to false. However, the logic that retrieves the seed for a given page offset will blindly use the number of seeds, without testing if the randomization is enabled, basically doing a modulo by 0. As it turns out, the libgcc in the common toolchain returns 0 here, which was our expected value in such a case, and why we would not detect it. However, U-Boot's libgcc will for some reason return from the function instead, resulting in an error to load the U-Boot binary in the SPL. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Scott Wood <oss@buserror.net> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-04-07Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini
trini: Disable CONFIG_SPL_USE_ARCH_MEMSET on orangepi_2 Signed-off-by: Tom Rini <trini@konsulko.com>
2017-04-05Blackfin: RemoveTom Rini
The architecture is currently unmaintained, remove. Cc: Benjamin Matthews <mben12@gmail.com> Cc: Chong Huang <chuang@ucrobotics.com> Cc: Dimitar Penev <dpn@switchfin.org> Cc: Haitao Zhang <hzhang@ucrobotics.com> Cc: I-SYST Micromodule <support@i-syst.com> Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de> Cc: Marek Vasut <marex@denx.de> Cc: Martin Strubel <strubel@section5.ch> Cc: Peter Meerwald <devel@bct-electronic.com> Cc: Sonic Zhang <sonic.adi@gmail.com> Cc: Valentin Yakovenkov <yakovenkov@niistt.ru> Cc: Wojtek Skulski <info@skutek.com> Cc: Wojtek Skulski <skulski@pas.rochester.edu> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-04-05sunxi: prepare for sharing MACH_SUN8I_H3 config symbolAndre Przywara
The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-05SPI: SPL: sunxi: fix 64-bit buildAndre Przywara
Addresses passed on to readl and writel are expected to be of the same size as a pointer. Change the parameter types of sunxi_spi0_read_data() to make the compiler happy and allow a warning-free aarch64 compile. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-04-05dm: core: Add flags parameter to device_remove()Stefan Roese
This patch adds the flags parameter to device_remove() and changes all calls to this function to provide the default value of DM_REMOVE_NORMAL for "normal" device removal. This is in preparation for the driver specific pre-OS (e.g. DMA cancelling) remove support. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
2017-03-28mtd: nand: remove nand size print from nand_init functionHou Zhiqiang
Add nand_size() function to move the nand size print into initr_nand(). Remove nand size print from nand_init() to allow other function to call nand_init() without printing nand size. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-03-28mtd: nand: add initialization flagHou Zhiqiang
Add initialization flag to avoid initializing NAND Flash multiple times, otherwise it will calculate a wrong total size. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-02-19mtd: nand: build MXS driver for MX7 as wellAndrey Yurovsky
The i.MX7 has the same GPMI controller as i.MX6 and is covered by the MXS driver. Tell Kconfig that we can use this driver on the MX7 platform (the MXS driver already has the few i.MX7-specific changes needed for basic operation and the board itself sets the pinmux correctly). Tested on i.MX7D with the Sabre board and a NAND Flash soldered to U12. Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
2017-02-12flash: complete CONFIG_SYS_NO_FLASH move with renamingMasahiro Yamada
We repeated partial moves for CONFIG_SYS_NO_FLASH, but this is not completed. Finish this work by the tool. During this move, let's rename it to CONFIG_MTD_NOR_FLASH. Actually, we have more instances of "#ifndef CONFIG_SYS_NO_FLASH" than those of "#ifdef CONFIG_SYS_NO_FLASH". Flipping the logic will make the code more readable. Besides, negative meaning symbols do not fit in obj-$(CONFIG_...) style Makefiles. This commit was created as follows: [1] Edit "default n" to "default y" in the config entry in common/Kconfig. [2] Run "tools/moveconfig.py -y -r HEAD SYS_NO_FLASH" [3] Rename the instances in defconfigs by the following: find . -path './configs/*_defconfig' | xargs sed -i \ -e '/CONFIG_SYS_NO_FLASH=y/d' \ -e 's/# CONFIG_SYS_NO_FLASH is not set/CONFIG_MTD_NOR_FLASH=y/' [4] Change the conditionals by the following: find . -name '*.[ch]' | xargs sed -i \ -e 's/ifndef CONFIG_SYS_NO_FLASH/ifdef CONFIG_MTD_NOR_FLASH/' \ -e 's/ifdef CONFIG_SYS_NO_FLASH/ifndef CONFIG_MTD_NOR_FLASH/' \ -e 's/!defined(CONFIG_SYS_NO_FLASH)/defined(CONFIG_MTD_NOR_FLASH)/' \ -e 's/defined(CONFIG_SYS_NO_FLASH)/!defined(CONFIG_MTD_NOR_FLASH)/' [5] Modify the following manually - Rename the rest of instances - Remove the description from README - Create the new Kconfig entry in drivers/mtd/Kconfig - Remove the old Kconfig entry from common/Kconfig - Remove the garbage comments from include/configs/*.h Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-08dm: core: Replace of_offset with accessorSimon Glass
At present devices use a simple integer offset to record the device tree node associated with the device. In preparation for supporting a live device tree, which uses a node pointer instead, refactor existing code to access this field through an inline function. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-01-14omap-gpmc: use SECTOR_BYTES instead of hardcoded valueLadislav Michl
Replace hardcoded value with defined constant SECTOR_BYTES. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-01-10Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini
2017-01-04mtd: nand: mxs_nand_spl: Fix to remove twise 'NAND' printJagan Teki
SPL from nand will print 'NAND' in boot_from_devices based on the image_loader name, remove the extra 'NAND ' in mxs_nand_spl driver. Original behaviour: ------------------- U-Boot SPL 2017.01-rc2-gf84dd8b (Jan 02 2017 - 22:24:19) Trying to boot from NANDNAND : 512 MiB After the fix: ------------- U-Boot SPL 2017.01-rc2-gf84dd8b-dirty (Jan 02 2017 - 23:17:00) Trying to boot from NAND: 512 MiB Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jagan@openedev.com>
2017-01-04spl: sunxi: Fix build error with CONFIG_SPL_SPI_SUNXIPriit Laes
Fix typo introduced in ebc4ef61d76fc182773fe225151adc9b913c62eb Signed-off-by: Priit Laes <plaes@plaes.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
2016-12-15Revert "sf: Fix quad bit set for micron devices"Cyrille Pitchen
This reverts commit c56ae7519f141523ba1248b22b5b5169b21772fe. Once the 'Quad Enable' bit is cleared in their Enhanced Volatile Configuration Register (EVCR), Micron memories expect ALL commands to use the SPI 4-4-4 protocol. Commands using SPI 1-y-z protocols are no longer accepted. Within the reverted commit, the write_evcr() function is implemented using the spi_flash_write_common(), which is a shortcut for the [ spi_flash_cmd_write_enable(), spi_flash_cmd_write(), spi_flash_cmd_wait_ready() ] sequence. Since the internal state of the Micron memory has been changed when the spi_flash_cmd_write() function completes, the later call of the spi_flash_cmd_wait_ready() function fails. Indeed the SPI controller driver is not aware of the SPI protocol switch. Further patches will fix the support of Micron QSPI memories. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> [Rebase on master, use JEDEC_MFR(info) in place of idcode0] Signed-off-by: Jagan Teki <jagan@openedev.com>
2016-12-15sf: Do not force the DT memory map size to exactly match the devicePhil Edworthy
As long as the memory mapped size specifeid in the DT is the same or bigger than the device size, it will work. So do not force the sizes to be identical. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2016-12-15mtd: spi: don't return -1 when scan succeedFabien Parent
In spi_flash_scan, 'ret' is initialled to -1, but 'ret' is not always used to store a return value, in that case, even when the function succeed, an error (-1) will be returned. Lets just return 0 if we hit the end of the function. Signed-off-by: Fabien Parent <fparent@baylibre.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2016-12-09spl: Add a name to the SPL load-image methodsSimon Glass
It is useful to name each method so that we can print out this name when using the method. Currently this happens using a separate function. In preparation for unifying this, add a name to each method. The name is only available if we have libcommon support (i.e can use printf()). Signed-off-by: Simon Glass <sjg@chromium.org>
2016-12-04mtd: cfi_flash: fix indentationAndre Przywara
The indentation is misleading here and suggests that the write command will be only executed in the else clause. It seems like this is not intended, so fix the indentation to avoid both compiler warnings and puzzled readers. Pointed out by GCC 6.2's -Wmisleading-indentation warning. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Stefan Roese <sr@denx.de>
2016-12-03NAND: davinci: add support for NAND chips with 16 bits busFabien Parent
The OMAPL138-LCD board uses a NAND chip with a 16 bits bus. Add support into the davinci driver for 16 bit bus NAND chips. Signed-off-by: Fabien Parent <fparent@baylibre.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-11-28mtd: nand: add support for the TC58NVG2S0H chipBoris Brezillon
Add the description of the Toshiba TC58NVG2S0H SLC nand to the nand_ids table so we can use the NAND ECC infos and the ONFI timings. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-11-26spi: Add of-platdata support to SPI and SPI flashSimon Glass
Some boards may want to use these subsystems with of-platdata in SPL. Add support for this by avoiding any device tree access in this case. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-22sf: Add support for MX66U51235F, MX66L1G45G, MT25QU02G, MT25QL02GRadu Bacrau
This commit adds support for the Macronix MX66U51235F, MX66L1G45G and Micron MT25QU02G, MT25QL02G flash parts. Signed-off-by: Radu Bacrau <dumitru.bacrau@intel.com> Cc: Chin Liang See <clsee@altera.com> Cc: Radu Bacrau <radu.bacrau@gmail.com> [Update proper commit header and 80-line cut on body] Reviewed-by: Jagan Teki <jagan@openedev.com>
2016-11-21drivers: SPI: sunxi SPL: fix warningAndre Przywara
Somehow an int returning function without a return statement sneaked in, fix it. Also fix some whitespace damage on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2016-11-19sf: Fix s25fs512s id tableJagan Teki
s25fs512s and s25fl512s_256k have common id information till 5 bytes and 6th byte have different family id like FS and FL-S as 0x81 and 0x80. Reported-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Jagan Teki <jagan@openedev.com>
2016-11-19sf: dataflash: Minor cleanupsJagan Teki
- fix single line comments - remove unneeded spaces - ascending order of include files - rename SPI DATAFLASH to dataflash - rename SPI DataFlash to dataflash - return NULL replaced with error code Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
2016-11-19sf: dataflash: Fix add_dataflash return logicJagan Teki
This patch fixed the add_dataflash return logic, so-that it can handle both jedec and older chips same as Linux. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>