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Update the EHCI driver to support interrupt transfers on PowerPC.
Signed-off-by: Adrian Cox <adrian@humboldt.co.uk>
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These data structures are passed to cache-flushing routines, and hence
must be conform to both the USB the cache-flusing alignment requirements.
That means aligning to USB_DMA_MINALIGN. This is important on systems
where cache lines are >32 bytes.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Section 4.10.2 "Advance Queue" of ehci-specification-for-usb.pdf
specifies how an EHCI controller loads a new QTD for processing if the
QH is not already marked as active. It states:
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If the field Bytes to Transfer is not zero and the T-bit in the Alternate
Next qTD Pointer is set to zero, then the host controller uses the
Alternate Next qTD Pointer. Otherwise, the host controller uses the Next
qTD Pointer. If Next qTD Pointer’s T-bit is set to a one, then the host
controller exits this state and uses the horizontal pointer to the next
schedule data structure.
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Hence, we must ensure that the alternate next QTD pointer's T-bit
(TERMINATE) is set, so the EHCI controller knows to use the next QTD
pointer.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Fix the register access in EHCI HCD. We need to use address of the register
as an ehci_writel() argument.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
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In case the controller is not initialized, we shall not de-initialize it.
As the control structure will not be filled, we will produce a null ptr
dereference if the controller is not inited.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
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This paramter will later be used to initialize OTG ports in
host or device mode.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
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This parameter will later be used to verify OTG ports.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
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The EHCI controller has some very specific requirements for the USB 2.0
port test modes, which were not closely followed in the initial test
mode commit. It demands that the host controller is completely shut down
(all ports suspended, Run/Stop bit unset) when activating test mode, and
will not work on an already enumerated port.
This patch fixes that by introducing a new ehci_shutdown() function that
closely follows the procedure listed in EHCI 4.14. Also, when we have
such a function anyway, we might as well also use it in
usb_lowlevel_stop() to make the normal host controller shutdown cleaner.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
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usb_lowlevel_init() allocates a new periodic_list each time it is invoked,
without freeing the original list. Since it is initialized later on in the code,
just reuse the first-allocated list in future invocations of usb_lowlevel_init.
Cc: Marek Vasut <marex@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
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Move the struct ehci_ctrl defition from ehci-hcd.c into ehci.h
so it can be re-used by drivers. In particular, the mv_udc driver
can benefit from this move.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Lei Wen <leiwen@marvell.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
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Commit 8f62ca6 "usb: ehci: Support interrupt transfers via periodic list"
didn't include any cache management in the new interrupt transfer path.
It also added an extra write to or_asynclistaddr in usb_lowlevel_init(),
without having flushed out the data there.
Add the missing cache management calls, so that the code works again.
This allows the USB keyboard on Tegra's Seaboard/Springbank boards to
work.
Cc: Patrick Georgi <patrick@georgi-clan.de>
Cc: Vincent Palatin <vpalatin@chromium.org>
Cc: Julius Werner <jwerner@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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This patch adds support to both Faraday FUSBH200 and FOTG210,
the differences between Faraday EHCI and standard EHCI are
listed bellow:
1. The PORTSC starts at 0x30 instead of 0x44.
2. The CONFIGFLAG(0x40) is not only un-implemented, and
also has its address space removed.
3. Faraday EHCI is a TDI design, but it doesn't
compatible with the general TDI implementation
found at both U-Boot and Linux.
4. The ISOC descriptors differ from standard EHCI in
several ways. But since U-boot doesn't support ISOC,
we don't have to worry about that.
Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Marek Vasut <marex@denx.de>
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There is at least one non-EHCI compliant controller (i.e. Faraday EHCI)
not only leave RESERVED and CONFIGFLAG registers un-implemented
but also has their address spaces removed.
As an result, the PORTSC register of Faraday EHCI always
starts from 0x30 instead of 0x44 in standard EHCI.
So that we'll need a weak-aliased function for abstraction.
Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Marek Vasut <marex@denx.de>
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1. The 'index' of ehci_submit_root() is not always > 0.
e.g.
While it gets invoked from usb_get_descriptor(),
the 'index' is always a '0'. (See ch.9 of USB2.0)
2. The PORTSC register is not always required, and thus it
should only report a port error when necessary.
It would cause a port scan failure if the ehci_submit_root()
always gets terminated by a port error.
Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Marek Vasut <marex@denx.de>
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This commit broke USB2 on link (Chromebook Pixel):
020bbcb usb: hub: Power-cycle on root-hub ports
However the root cause seems to be a missing mask and missing 'break'
in ehci-hcd.c. This patch fixes both.
On link, 'usb start' with a USB keyboard and memory stick inserted now
finds both. The keyboard works as expected. Also ext2ls shows a directory
listing from the memory stick.
Signed-off-by: Simon Glass <sjg@chromium.org>
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We can use a common global method for calculating minimum of
3 numbers. Put the same in 'common header' and let 'ehci'
use it.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Acked-by: Tom Rini <trini@ti.com>
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This patch adds a new 'usb test' command, that will set a port to a USB
2.0 test mode (see USB 2.0 spec 7.1.20). It supports all five test modes
on both downstream hub ports and ordinary device's upstream ports. In
addition, it supports EHCI root hub ports.
Signed-off-by: Julius Werner <jwerner@chromium.org>
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Add ehci_get_port_speed() and ehci_set_usbmode() weak functions
for platform driver to support new chip.
Signed-off-by: Jim Lin <jilin@nvidia.com>
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Interrupt transfers aren't meant to be used from the async list
(the EHCI spec indicates trouble with low/full-speed intr on async).
Build a periodic list instead, and provide an API to make use of it.
Then, use that API from the existing interrupt transfer API.
This provides support for USB keyboards using EHCI.
Use timeouts to ensure we cannot get stuck in the keyboard scanning
if something wrong happens (USB device unplugged or fatal I/O error)
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Julius Werner <jwerner@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
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On EHCI controller with 64-bit address space support, we must initialize
properly the high word for the PCI bus master accesses.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
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Linux usb/ch9.h seems to have all the same information (and more)
as usbdescriptors.h so use the former instead of the later one.
As a consequense of this change USB_SPEED_* values don't correspond
directly to EHCI speed encoding anymore, I've added necessary
recoding in EHCI driver. Also there is no point to put speed into
pipe anymore so it's removed and a bunch of host drivers fixed to
look at usb_device->speed instead.
Old usbdescriptors.h included is not removed as it seems to be
used by old USB device code.
This makes usb.h and usbdevice.h incompatible. Fortunately the
only place that tries to include both are the old MUSB code and
it needs usb.h only for USB_DMA_MINALIGN used in aligned attribute
on musb_regs structure but this attribute seems to be unneeded
(old MUSB code doesn't support any DMA at all).
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
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This is clearly some sort of debug output and should not
be printed during normal operation.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
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Kill off ehci-core.h
It was used to specify some static controller data. To support more than
one controller being active at any time we have to carry the controller
data ourselfes. Change the ehci interface accordingly.
NOTE: OMAP implemented the ehci stuff a bit backwards and should be fixed
to do the same thing as other platforms. But the change for now is at least
compile clean.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Reviewed-by: Marek Vasut <marex@denx.de>
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Carry an index in the lowlevel usb functions to make specify the
respective usb controller.
Also pass through an controller struct from lowlevel_init to the
creation of the root usb device of this controller.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Reviewed-by: Marek Vasut <marex@denx.de>
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usb_hub_descriptor has to be packed as it's used for
communication with the device. Member wHubCharacteristics
violates the natural alignment rules.
Use explicit unaligned access functions for this member.
Fixes ARMv7 traping while using USB.
v2: fix typo found by Thomas Langer
v3: rebased on top of u-boot-usb/master
Signed-off-by: Lucas Stach <dev@lynxeye.de>
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Relax the qTD transfer alignment constraints in order to need less qTDs for
buffers that are aligned to 512 bytes but not to pages.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Ilya Yanok <ilya.yanok@cogentembedded.com>
Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
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This patch takes advantage of the hardware EHCI qTD queuing mechanism to avoid
software and transfer splitting overhead so as to make transfers as fast as
possible.
The only drawback is a call to memalign. However, this is fast compared to the
transfer timings, and the heap size to allocate is small, e.g. 128 kiB in the
worst case for a transfer length of 65535 packets of 512 bytes.
Tested on i.MX25, i.MX35 and i.MX51. In my test conditions, the speed gain was
very significant (several times faster), which is really appreciable when
accessing large files.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Ilya Yanok <ilya.yanok@cogentembedded.com>
Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
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Make some light cosmetic code cleanup by the way.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Ilya Yanok <ilya.yanok@cogentembedded.com>
Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
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Interrupt transfers requiring several transactions are not supported by
submit_int_msg() because bInterval is ignored. This patch returns a failure code
and prints an error message in this case.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Ilya Yanok <ilya.yanok@cogentembedded.com>
Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
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Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Ilya Yanok <ilya.yanok@cogentembedded.com>
Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
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Printing message could be useful if something goes really wrong.
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
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Buffer coming from upper layers should be cacheline aligned/padded
to perform safe cache operations. For now we don't do bounce
buffering so getting unaligned buffer is an upper layer error.
We can't check if the buffer is properly padded with current
interface so just assume it is (consider changing with in the
future). The following changes are done:
1. Remove useless length alignment check. We get actual transfer
length not the size of the underlying buffer so it's perfectly
valid for it to be unaligned.
2. Move flush_dcache_range() out of while loop or it will
flush too much.
3. Don't try to fix buffer address before calling invalidate:
if it's unaligned it's an error anyway so let cache subsystem
cry about that.
4. Fix end buffer address to be cacheline aligned assuming upper
layer reserved enough space. This is potentially dangerous
operation so upper layers should be careful about that.
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
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The USB spec says that 32 bytes is the minimum required alignment.
However on some platforms we have a larger minimum requirement for cache
coherency. In those cases, use that value rather than the USB spec
minimum. We add a cpp check to <usb.h> to define USB_DMA_MINALIGN and
make use of it in ehci-hcd.c and musb_core.h. We cannot use MAX() here
as we are not allowed to have tests inside of align(...).
Signed-off-by: Tom Rini <trini@ti.com>
[marek.vasut]: introduce some crazy macro voodoo
Signed-off-by: Marek Vasut <marex@denx.de>
[ilya.yanok]: moved external buffer fixes to separate patch,
we use {ALLOC,DEFINE}_ALIGN_BUFFER macros with alignment of USB_DMA_MINALIGN
for qh_list, qh and qtd structures to make sure they are proper aligned
for both controller and cache operations.
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
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Move or_asynclistaddr programming to ehci_submit_async()
function to make sure queue head is properly programmed
before every transfer. This solves the problem with changing
qh address.
Also remove unneeded qh_list->qh_link reprogramming at the
end of transfer.
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
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The construction of QH and qTD lists in ehci_submit_async() call is cryptic
business, add at least a bit of comments so if someone is reading it, he can at
least reference the intel ehci manual (ehci-r10.pdf).
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
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Discard the creepy cache flushing mechanisms in ehci-hcd.c and replace them with
more straightforward flushing. In the new approach, the flushing takes place
directly in ehci_submit_async() call instead of going through the QH list and
flushing all members and buffers. This discards a lot of weird bit operations
on the members of QH and qTD structures.
NOTE: Certainly, this flushes even qTDs which are possibly unused in some
transactions, though the overhead of the previous code was much higher than is
the overhead of flushing two more cache lines (which most probably aren't even
cached).
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
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These two functions were called only from ehci_submit_async(), therefore
dissolve them as part of ehci_submit_async() to get rid of all those static
variables.
Signed-off-by: Marek Vasut <marex@denx.de>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
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CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the txfilltuning
field in the EHCI controller on reset.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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Common code has a mdelay() func, so use that instead of the usb-specific
wait_ms() func. This also fixes the build errors:
ohci-hcd.c: In function 'submit_common_msg':
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1519:9: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1816:10: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1827:10: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1844:10: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1563:11: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1583:9: sorry, unimplemented: called from here
make[1]: *** [ohci-hcd.o] Error 1
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Marek Vasut <marex@denx.de>
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This moves keyboard polling logic from USB HCD drivers into USB
keyboard driver. Remove usb_event_poll() as keyboard polling was
the only user of this API. With this patch USB keyboard works with
EHCI controllers again. Tested on a tegra2 seaboard.
Signed-off-by: Allen Martin <amartin@nvidia.com>
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This patch allows USB to work on some hosts, which need additional frobing after
the host was powered up via regular USB powerup sequence.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Wolfgang Grandegger <wg@denx.de>
Cc: Jason Liu <r64343@freescale.com>
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According to EHCI specification v1.0, the controller should stabilize
the power on a port at most 20 ms after the port power bit transition.
So, we put this setting in the virtual descriptor corresponding field,
(bPwrOn2PwrGood = 10 => 10 x 2ms = 20ms), this saves about 500ms at each
controller initialization/enumeration.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
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Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Remy Bohmer <linux@bohmer.net>
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With this, the EHCI seems to "recover" from a timeout. This is particularly
observable if you were to ping the wrong IP Address and then ping the correct
one or if there was a temporary failure during tftp sessions.
All it takes is one timeout to disable it. If you have a noisy network (lot
of traffic), even if the traffic is not for the board, the timeouts don't occur.
Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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Changed both to use a common timeout for URB submission, since they were using
different values and EHCI's was too short.
Also fixed EHCI to actually check if urb submission succeeded, rather than
silently continuing into the weeds.
Change-Id: I7f71499ffaa05187d8e5618db2419e1606007b82
Signed-off-by: Simon Glass <sjg@chromium.org>
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This patch fixes a problem noticed on lwmon5 (PPC440EPx) using the
common EHCI driver, when "usb reset" is issued multiple times.
Upon the 2nd (and further) "usb reset" command, the command fails
with the following messages:
=> usb reset
(Re)start USB...
USB: Register 1111 NbrPorts 1
USB EHCI 1.00
scanning bus for devices... 5 USB Device(s) found
scanning bus for storage devices... 2 Storage Device(s) found
=> usb reset
(Re)start USB...
USB: EHCI fail to reset
Error, couldn't init Lowlevel part
This patch fixes this problem. Now "usb reset" can be called multiple
times.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
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This watchdog reset call is needed here, otherwise the lwmon5 board
(PPC440EPx based) will reset upon the "usb reset" command.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
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Checking the status field of the qTD token in the current code
do not take into acount cases where endpoint stall (halted) bit
is set together with XactErr status bit. As a result clearing
stall on an endpoint won't be done if this status bit was also
set. Check for halted bit and report USB_ST_STALLED status
if the host controller also indicates endpoit stall condition.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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This patch solves a problem with USB hanging under higher load on a
i.MX31 board. It falls into class of typical USB problems and fixes:
if you don't understand the real cause, add a delay somewhere.
The problem appeared after introduction of ELF relocation, which
results in smaller code, which appears to run faster (probably because
it fits better in the cache); turning off the instruction cache,
adding debug printf()s and increasing the delay have all been found to
make the problem go away.
Moving the original "udelay(1)" up in the code to it's new place made
the problem appear much less frequently. Increasing the delay to 2
microseconds then made the code run reliably in all (hour-long) tests.
To be on the safe side, we set it to 5 microseconds here.
Signed-off-by: Heiko schocher <hs@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Stefano Babic <sbabic@denx.de>
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