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The R8A7795 and R8A7796 tables use different constants to identify
clock in DT, so split the tables and use the correct constants on
R8A7795. This fixes UART clock misconfiguration on R8A7795.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Otherwise:
drivers/usb/gadget/f_fastboot.c:564:32: warning: format "%lx" expects
argument of type "long unsigned int", but argument 3 has type "unsigned
int" [-Wformat=]
Signed-off-by: Tom Rini <trini@konsulko.com>
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There is no guarantee that commands are null-terminated in the USB
request buffer, so limit the length of data that is printed.
Signed-off-by: John Keeping <john@metanate.com>
Tested-by: Steve Rae <steve.rae@raedomain.com>
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Fastboot loads an image at CONFIG_FASTBOOT_BUF_ADDR, but currently
tells do_bootm() to look for an image at $loadaddr. This breaks if
CONFIG_FASTBOOT_BUF_ADDR is different from the current user-set
loadaddr.
Instead, tell do_bootm() to pick up the image where it was laoded.
Signed-off-by: Peter Chubb <peter.chubb@data61.csiro.au>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Steve Rae <steve.rae@raedomain.com>
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This converts CONFIG_USB_EHCI_PCI to a Kconfig option, and updates
all boards that use it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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- Merge sys_reset data of LD4, Pro4, sLD8 and Pro5
- Merge sys_reset data of LD11 and LD20
- Use primitive UNIPHIER_RESETX() macro because bit assignments for
system reset will be changed for every SoC in the future
- Add NAND and eMMC resets
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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This SoC is too old. It is difficult to maintain any longer.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Since commit f0776a551764 ("spl: dm: Kconfig: SPL_CLK depends on
SPL_DM"), the following warning is displayed:
$ make uniphier_v8_defconfig
warning: (ARCH_ZYNQ && ARCH_ZYNQMP && STM32F7 && CLK_UNIPHIER) selects
SPL_CLK which has unmet direct dependencies (CLK && SPL_DM)
While I am here, I am removing the prompt to make it user-unconfigurable
option so that "select CLK_UNIPHIER" can be omitted.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Fix the IOMUX setting for SDcard CMD pin at the same time.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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The dts from kernel is using rk3228-pinctrl as compatible name,
need to sync with it to make the driver work.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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This changes pci_mmc driver to use PCI_CLASS_SYSTEM_SDHCI instead of
individual vendor id & device id pair to support generic PCI SD host
controller.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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This patch allows to show the EXT_CSD[179] partition_config
register info, just by specifying the dev param:
U-Boot> mmc partconf 0
EXT_CSD[179], PARTITION_CONFIG:
BOOT_ACK: 0x0
BOOT_PARTITION_ENABLE: 0x0
PARTITION_ACCESS: 0x0
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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All boards which use DM_MMC have now been converted to use DM_MMC_OPS.
Drop the option and good riddance.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This should depend on SPL_DM_MMC, not SPL_DM. For it and update the only
affected board's defconfig.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Enable driver model for MMC (including BLK), SATA and USB. Note that USB
does not yet work correctly since the nodes are disabled. Hopefully this
can be resolved by the maintainer.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This driver does not currently support CONFIG_DM_MMC_OPS. Update it to
fully convert it to driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Update this driver to support a live device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
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We want to use fsl_esdhc_init() with driver model. Move the mmc_init() out
of this function so that we can use it for our common init.
Signed-off-by: Simon Glass <sjg@chromium.org>
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With driver model we want to store the mmc and configuration structure in
platform data. Set up structure up and use it for non-DM as well.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Since esdhc_init_common() can fail it should return an error code. Update
this and also adjust the timeout mechanism to use get_timer(), which is a
more common approach.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Since esdhc_reset() can fail it should return an error code. Update this
and also adjust the timeout mechanism to use get_timer(), which is a more
common approach.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Driver model wants to use the core functions in this file but accesses the
driver-private data in a different way. Move the code into new 'common'
functions and set up stubs to call these. Also sort the operations into
alphabetical order for consistency.
Signed-off-by: Simon Glass <sjg@chromium.org>
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With driver model we will not use mmc->priv to access driver-private data.
To accomodate this, update internal functions so that we can pass the
private data directly. This will allow the caller to obtain it as it
prefers.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Update this driver to support driver model. This involves implementing the
AHCI operations and reusing existing common code.
Signed-off-by: Simon Glass <sjg@chromium.org>
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At present the AHCI uclass is just a shell and we still use the global
functions to access SATA. Fix this by adding operations to the uclass.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Driver model wants to use the core functions in this file but accesses the
uclass-private data in a different way. Move the code into new 'common'
functions and set up stubs to call these.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This function will not be used with driver model and it relates to the
other exported functions. Move it down next to them.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This variable is set but never used. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Rename dwc_ahsata.h to indicate that it is a private header file. We plan
to create another header with some public functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Sort the header file inclusions into the correct order.
Signed-off-by: Simon Glass <sjg@chromium.org>
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There is a strange &(var) coding style in this driver. Adjust it to use
&var instead, which is more usual.
Signed-off-by: Simon Glass <sjg@chromium.org>
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With driver model sata_dev_desc[] does not exist. We still want to use the
common code of this driver so update it to pass struct ahci_uc_priv * to
each of these functions, instead of an integer which must be looked up in
sata_dev_desc[].
Signed-off-by: Simon Glass <sjg@chromium.org>
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Most of the casts in this driver are not necessary. With driver model we
do not cast from void *. Update the driver to follow this rule.
Signed-off-by: Simon Glass <sjg@chromium.org>
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With driver model this becomes uclass-private data. Rename the parameter
varable to reflect this.
With the driver model conversion we will not have any exported functions.
Move all exported functions to be together at the end of the file so that
we can deal with them in one #ifdef block.
Signed-off-by: Simon Glass <sjg@chromium.org>
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With the driver model conversion we will not have any exported functions.
Move all exported functions to be together at the end of the file so that
we can deal with them in one #ifdef block.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This function is not called from anywhere. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Some functions are not called from outside this file. Make these static
to make that obvious.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This returns 'ret' but the value is always zero. Update it to simply
return 0, for clarity.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Add a function to find the name of an interface type (e.g. "sata", "scsi")
from the interface type enum.
This is useful for generic code (not specific to SATA or SCSI, for
example) that wants to display the type of interface it is dealing with.
Signed-off-by: Simon Glass <sjg@chromium.org>
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We cannot call dm_scan_fdt_dev() with of-platdata since there is no device
tree. Fix this with an #if check.
Fixes: 3be9a37 (dm: syscon: scan sub-nodes of the syscon node)
Signed-off-by: Simon Glass <sjg@chromium.org>
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The bind() method is called before the device is probed and so the
device has no private data, should use the platform data, and set up
a new struct to hold the mmc and cfg members.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Since we now have clock driver for the RCar Gen3 , add support for
enabling the clock into the SH SDHI driver to prevent hacks in the
board files.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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The command handling in this driver is awful, esp. because the driver
depends on command numbers to determine whether this is APPCMD or not.
Also, handling of command RSP response types is totally wrong.
This patch at least plucks out some of the custom command encoding and
fixes the APPCMD handling. The RSP handling still needs work, yet that
might not be needed as it turns out the uniphier-sd.c driver is in much
better shape and supports the same IP, so we might be able to just drop
this driver in favor of the uniphier one.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Add MMC DM and DT probing support into the SH SDHI driver.
This patch abstracts out the common bits of the send command
and set ios functions, so they can be used both by DM and non
DM setups and adds the DM probe support.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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The long response entry 0..3 LSByte comes from the next response
register MSByte, not from the next response register LSByte. Fix
this to make the driver report correct values in response 136 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Update pfla02 for setenv changes and PHYLIB/etc migration to Kconfig.
Signed-off-by: Tom Rini <trini@konsulko.com>
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On some flash (like Macronix), QE (quad enable) bit is in the same
status register as BP# bits, and we need preserve its original value
during a reboot cycle as this is required by some platforms (like
Intel ICH SPI controller working under descriptor mode).
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
[Refined code for readability]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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