summaryrefslogtreecommitdiff
path: root/include/configs/MPC8315ERDB.h
AgeCommit message (Collapse)Author
2008-06-1083xx/85xx: further localbus cleanupsAnton Vorontsov
move the BRx_* and ORx_* left behind in mpc85xx.h The same is needed for mpc8xx.h and mpc8260.h (defines are almost the same, just few differences which needs some attention though). But the bad news for mpc8xx and mpc8260 is that there are a lot of users of these defines. So this cleanup I'll leave for the "better times". Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-06-03PPC: Create and use CONFIG_HIGH_BATSBecky Bruce
Change all code that conditionally operates on high bat registers (that is, BATs 4-7) to look at CONFIG_HIGH_BATS instead of the myriad ways this is done now. Define the option for every config for which high bats are supported (and enabled by early boot, on parts where they're not always enabled) Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-04-25mpc83xx: bump loadaddr over fdtaddr to 0x500000Kim Phillips
this seems as a good compromise between human memory, typing, and last but not least, to accommodate for current and future kernel bloat. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Acked-by: Dave Liu <daveliu@freescale.com>
2008-03-28mpc83xx: enable the SATA interface on mpc8315 rdb and mpc837x rdb boardsKim Phillips
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-26mpc83xx: Set PCI I/O bus-address base to zero.Scott Wood
The device trees for these boards describe PCI I/O as starting from address zero from the device's perspective. Placing I/O elsewhere may cause problems with certain PCI boards, and may cause problems with Linux. Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-02-11Get rid of "#undef DEBUG" from board config files.Wolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-01-16mpc83xx: Add the support for MPC8315ERDB boardDave Liu
The features list: - Boot from NOR Flash - DDR2 266MHz hardcoded configuration - Local bus NOR Flash R/W operation - I2C, UART, MII and RTC - eTSEC0/1 support - PCI host Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>