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path: root/include/configs/galileo.h
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2015-12-22net: eth_designware: select PHYLIB in KconfigThomas Chou
Select PHYLIB in drivers/net/Kconfig. And remove CONFIG_PHYLIB from legacy board header files. This fixed the warnings when both ALTERA_TSE and ETH_DESIGNWARE are selected. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reported-by: Pavel Machek <pavel@denx.de> Acked-by: Chin Liang See <clsee@altera.com> Acked-by: Pavel Machek <pavel@denx.de> Tested-by: Pavel Machek <pavel@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-13x86: Remove CONFIG_SYS_EARLY_PCI_INITBin Meng
CONFIG_SYS_EARLY_PCI_INIT is not needed any more since with driver model, PCI enumeration is automatically triggered. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-09-17x86: quark: Add PCIe/USB static register programming after memory initBin Meng
This adds static register programming for PCIe and USB after memory init as required by Quark firmware writer guide. Although not doing this did not cause any malfunction, just do it for safety. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-09-09x86: Convert to use driver model pci on quark/galileoBin Meng
Move to driver model pci for Intel quark/galileo. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-08-05x86: Move CONFIG_X86_SERIAL to KconfigSimon Glass
Move this config option to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-06-04x86: quark: Implement PIRQ routingBin Meng
Intel Quark SoC has the same interrupt routing mechanism as the Queensbay platform, only the difference is that PCI devices' INTA/B/C/D are harcoded and cannot be changed freely. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-06-04x86: Set CONFIG_NR_DRAM_BANKS to 8 and move it to x86-common.hBin Meng
Some x86 boards set CONFIG_NR_DRAM_BANKS to 1, which causes incorrect DRAM size printed when booting from coreboot, like this: CPU: x86, vendor Intel, device 663h DRAM: 636 KiB Using default environment Change it to 8 which should be enough for both coreboot and bare cases, and move it to x86-common.h. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-04-30x86: Move CONFIG_ENV_IS_IN_SPI_FLASH to x86-common.hBin Meng
Since all x86 boards use spi flash as its bootloader storage media, it makes sense to make CONFIG_ENV_IS_IN_SPI_FLASH a common option. So far only minnowmax board does not support it so undefine it in its board configuration file. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-03-25x86: galileo: Enable saving environment in SPI flashBin Meng
Saving U-Boot's environment in SPI flash on Intel Galileo board. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sg@chromium.org>
2015-03-25x86: quark: Enable on-chip ethernet controllersBin Meng
Intel Quark SoC integrates two 10/100 ethernet controllers which can be connected to an external RMII PHY. The MAC IP is from Designware. Enable this support with the existing U-Boot Designware MAC driver so that the ethernet port on Intel Galileo board can be used. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-02-06x86: Add SD/MMC support to quark/galileoBin Meng
Intel Galileo board has a microSD slot which is routed from Quark SoC SDIO controller. Enable SD/MMC support so that we can use an SD card. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-02-06x86: Add basic Intel Galileo board supportBin Meng
New board/intel/galileo board directory with minimum codes, plus board dts, defconfig and configuration files. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>