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path: root/include/configs/kilauea.h
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2011-05-12PPC405EX CHIP_21 erratumSteven A. Falco
APM errata CHIP_21 for the 405EX/EXr (from the rev 1.09 document dated 4/27/11) states that rev D processors may wake up with the wrong feature set. This patch implements the APM-proposed workaround. To enable this patch for your board, add the appropriate define for your CPU to your board header file. See kilauea.h for more information. The following variants are supported: #define CONFIG_SYS_4xx_CHIP_21_405EX_NO_SECURITY #define CONFIG_SYS_4xx_CHIP_21_405EX_SECURITY #define CONFIG_SYS_4xx_CHIP_21_405EXr_NO_SECURITY #define CONFIG_SYS_4xx_CHIP_21_405EXr_SECURITY Please note that if you select the wrong define, your board will not boot, and JTAG will be required to recover. Tested on custom boards using: CONFIG_SYS_4xx_CHIP_21_405EX_NO_SECURITY <sfalco@harris.com> CONFIG_SYS_4xx_CHIP_21_405EX_SECURITY <eibach@gdsys.de> Signed-off-by: Steve Falco <sfalco@harris.com> Acked-by: Dirk Eibach <eibach@gdsys.de> Signed-off-by: Stefan Roese <sr@denx.de>
2010-10-26Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated valueWolfgang Denk
CONFIG_SYS_GBL_DATA_SIZE has always been just a bad workarond for not being able to use "sizeof(struct global_data)" in assembler files. Recent experience has shown that manual synchronization is not reliable enough. This patch renames CONFIG_SYS_GBL_DATA_SIZE into GENERATED_GBL_DATA_SIZE which gets automatically generated by the asm-offsets tool. In the result, all definitions of this value can be deleted from the board config files. We have to make sure that all files that reference such data include the new <asm-offsets.h> file. No other changes have been done yet, but it is obvious that similar changes / simplifications can be done for other, related macro definitions as well. Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-26Rename CONFIG_SYS_INIT_RAM_END into CONFIG_SYS_INIT_RAM_SIZEWolfgang Denk
CONFIG_SYS_INIT_RAM_END was a misnomer as it suggests this might be some end address; to make the meaning more clear we rename it into CONFIG_SYS_INIT_RAM_SIZE No other code changes are performed in this patch, only minor editing of white space (due to the changed length) and the comments was done, where noticed. Note that the code for the PATI and cmi_mpc5xx board configurations looks seriously broken. Last known maintainers on Cc: Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Denis Peter <d.peter@mpl.ch> Cc: Martin Winistoerfer <martinwinistoerfer@gmx.ch> Acked-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-18Makefile: move all Power Architecture boards into boards.cfgWolfgang Denk
Clean up Makefile, and drop a lot of the config.mk files on the way. We now also automatically pick all boards that are listed in boards.cfg (and with all configurations), so we can drop the redundant entries from MAKEALL to avoid building these twice. Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-04ppc4xx: Use common ns16550 functions in 4xx UART POST driverStefan Roese
This patch changes the PPC4xx POST UART driver to use the common NS16550 functions for receiving and sending. Additionally the local function for SoC divisor setup are removed. Instead the functions from arch/powerpc/cpu/ppc4xx/4xx_uart.c are used. This removes code duplication. Also the common CONFIG_SYS_NS16550_COMx defines are now used to describe the POST UART's. And a compile breakage is fixed, introduced by a git merge of the ppc4xx/next branch into master. Now "ppc4xx.h" is moved to "asm/ppc4xx.h". Fixed as well with this patch. Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-28Merge branch 'next' of /home/wd/git/u-boot/nextWolfgang Denk
Conflicts: include/ppc4xx.h Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-09-23ppc4xx: Use common NS16550 driver for PPC4xx UARTStefan Roese
This patch removes the PPC4xx UART driver. Instead the common NS16550 driver is used, since all PPC4xx SoC's use this peripheral device. The file 4xx_uart.c now only implements the UART clock calculation function which also sets the SoC internal UART divisors. All PPC4xx board config headers are changed to use this common NS16550 driver now. Tested on these boards: acadia, canyonlands, katmai, kilauea, sequoia, zeus Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-21POST cleanup.Michael Zaidman
- Revives POST for blackfin arch; - Removes redundant code: arch/blackfin/lib/post.c arch/powerpc/cpu/ppc4xx/commproc.c arch/powerpc/cpu/mpc512x/common.c - fixes up the post_word_{load|store} usage. Signed-off-by: Michael Zaidman <michael.zaidman@gmail.com> Acked-by: Detlev Zundel <dzu@denx.de> Tested-by: Anatolij Gustschin <agust@denx.de> List of the maintainers of the affected by patch boards: Cc: Stephan Linz <linz@li-pro.net> Cc: Denis Peter <d.peter@mpl.ch> Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Stefan Roese <sr@denx.de> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Niklaus Giger <niklaus.giger@netstal.com> Cc: Larry Johnson <lrj@acm.org> Cc: Feng Kan <fkan@amcc.com>
2010-04-21Move arch/ppc to arch/powerpcStefan Roese
As discussed on the list, move "arch/ppc" to "arch/powerpc" to better match the Linux directory structure. Please note that this patch also changes the "ppc" target in MAKEALL to "powerpc" to match this new infrastructure. But "ppc" is kept as an alias for now, to not break compatibility with scripts using this name. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> Acked-by: Detlev Zundel <dzu@denx.de> Acked-by: Kim Phillips <kim.phillips@freescale.com> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Anatolij Gustschin <agust@denx.de>
2010-04-13ppc: Move cpu/$CPU to arch/ppc/cpu/$CPUPeter Tyser
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-01-23ppc4xx: Kilauea: Add CPLD version detection and EBC reconfigurationStefan Roese
A newer CPLD version on the 405EX evaluation board requires a different EBC controller setup for the CPLD register access. This patch adds a CPLD version detection for Kilauea and code to reconfigure the EBC controller (chip select 2) for the old CPLD if no new version is found. Additionally the CPLD version is printed upon bootup: Board: Kilauea - AMCC PPC405EX Evaluation Board (CPLD rev. 0) Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> Cc: Zhang Bao Quan <bqzhang@udtech.com.cn>
2009-12-08common: delete CONFIG_SYS_64BIT_VSPRINTF and CONFIG_SYS_64BIT_STRTOULHeiko Schocher
There is more and more usage of printing 64bit values, so enable this feature generally, and delete the CONFIG_SYS_64BIT_VSPRINTF and CONFIG_SYS_64BIT_STRTOUL defines. Signed-off-by: Heiko Schocher <hs@denx.de>
2009-07-28ppc4xx: Kilauea: Fix SDRAM init in NAND booting versionStefan Roese
DDR2 Auto-calibration needs to be disabled on the NAND booting PPC4xx targets. Otherwise the configured fixed init values for some DDR2 controller registers (e.g. RQDC) are not initialized at all resulting in a non working SDRAM. Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-24ppc4xx: Add chip_config command to AMCC Kilauea eval boardStefan Roese
This patch removes the "alterpll" command and replaces it with the now ppc4xx standard "chip_config" command to configure the I2C bootstrap EEPROM. Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-24ppc4xx: Fix EEPROM configuration on KilaueaStefan Roese
Kilauea has an AT24C02 EEPROM which has an 8 byte page. Without defining CONFIG_SYS_EEPROM_PAGE_WRITE_BITS to 3 the "eeprom" command doesn't work correctly. Additionally the page write delay (CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS) is set to a more defensive value of 10ms. Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-18NAND: Fix warning Please define CONFIG_SYS_64BIT_VSPRINTF...Wolfgang Denk
Commit 8d2effea added a warning for configurations that use NAND without defining the (then necessary) CONFIG_SYS_64BIT_VSPRINTF but failed to fix the affected boards. Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-04-16ppc4xx: Disable POST memory test on NAND-booting KilaueaStefan Roese
Don't run the memory POST on the NAND-booting version. It will overwrite part of the U-Boot image which is already loaded from NAND to SDRAM. We were just lucky that it booted at all with this SDRAM test enabled. Signed-off-by: Stefan Roese <sr@denx.de>
2009-02-12ppc4xx: Autocalibration can set RDCC to over aggressive value.Adam Graham
The criteria of the AMCC SDRAM Controller DDR autocalibration U-Boot code is to pick the largest passing write/read/compare window that also has the smallest SDRAM_RDCC.[RDSS] Read Sample Cycle Select value. On some Kilauea boards the DDR autocalibration algorithm can find a large passing write/read/compare window with a small SDRAM_RDCC.[RDSS] aggressive value of Read Sample Cycle Select value "T1 Sample". This SDRAM_RDCC.[RDSS] Read Sample Cycle Select value of "T1 Sample" proves to be to aggressive when later on U-Boot relocates into DDR memory and executes. The memory traces on the Kilauea board are short so on some Kilauea boards the SDRAM_RDCC.[RDSS] Read Sample Cycle Select value of "T1 Sample" shows up as a potentially valid value for the DDR autocalibratiion algorithm. The fix is to define a weak default function which provides the minimum SDRAM_RDCC.[RDSS] Read Sample Cycle Select value to accept for DDR autocalibration. The default will be the "T2 Sample" value. A board developer who has a well defined board and chooses to be more aggressive can always provide their own board specific string function with the more aggressive "T1 Sample" value or stick with the default minimum SDRAM_RDCC.[RDSS] value of "T2". Also put in a autocalibration loop fix for case where current write/read/compare passing window size is the same as a prior window size, then in this case choose the write/read/compare result that has the associated smallest RDCC T-Sample value. Signed-off-by: Adam Graham <agraham@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
2009-01-23NAND: rename NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPSWolfgang Grandegger
This patch renames NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS and changes the default from 8 to 1 for the legacy and the new MTD NAND layer. This allows to remove all NAND_MAX_CHIPS definitions in the board config files because none of the boards use multi chip support (NAND_MAX_CHIPS > 1) so far. The bamboo and the DU440 define #define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE but that's bogus and did not work anyhow. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-10-24ppc4xx: Disable DDR2 autocalibration on Kilauea for nowStefan Roese
Since the new autocalibration still has some problems on some Kilauea boards with 200MHz DDR2 frequency we disable the autocalibration and use the hardcoded values as done before. This seems to work reliably on all known DDR2 frequencies. After the autocalibration issue is fixed we will enable it again. Signed-off-by: Stefan Roese <sr@denx.de>
2008-10-18rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-10rename CFG_ENV macros to CONFIG_ENVJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-10rename CFG_ENV_IS_IN_FLASH in CONFIG_ENV_IS_IN_FLASHJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-10rename CFG_ENV_IS_IN_NAND in CONFIG_ENV_IS_IN_NANDJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-05ppc4xx: Update Kilauea to use PPC4xx DDR autocalibration routinesAdam Graham
Signed-off-by: Adam Graham <agraham@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
2008-08-13Merge branch 'Makefile' of git://git.denx.de/u-boot-armWolfgang Denk
2008-08-12drivers/mtd: Move conditional compilation to MakefileJean-Christophe PLAGNIOL-VILLARD
rename CFG_FLASH_CFI_DRIVER to CONFIG_FLASH_CFI_DRIVER Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-07-11ppc4xx: Add MII mode support to the EMAC RGMII BridgeGrant Erickson
This patch adds support for placing the RGMII bridge on the PPC405EX(r) into MII/GMII mode and allows a board-specific configuration to specify the bridge mode at compile-time. Signed-off-by: Grant Erickson <gerickson@nuovations.com> Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11ppc4xx: Add Mnemonics for AMCC/IBM DDR2 SDRAM ControllerGrant Erickson
This patch completes the preprocessor mneomics for the IBM DDR2 SDRAM controller registers (MODT and INITPLR) used by the PowerPC405EX(r). The MMODE and MEMODE registers are unified with their peer values used for the INITPLR MR and EMR registers, respectively. Finally, a spelling typo is correct (MANUEL to MANUAL). With these mnemonics in place, the CFG_SDRAM0_* magic numbers for Kilauea are replaced by equivalent mnemonics to make it easier to compare and contrast other 405EX(r)-based boards (e.g. during board bring-up). Finally, unified the SDRAM controller register dump routine such that it can be used across all processor variants that utilize the IBM DDR2 SDRAM controller core. It produces output of the form: PPC4xx IBM DDR2 Register Dump: ... SDRAM_MB0CF[40] = 0x00006701 ... which is '<mnemonic>[<DCR #>] = <value>'. The DCR number is included since it is not uncommon that the DCR values in header files get mixed up and it helps to validate, at a glance, they match what is printed in the user manual. Tested on: AMCC Kilauea/Haleakala: - NFS Linux Boot: PASSED - NAND Linux Boot: PASSED Signed-off-by: Grant Erickson <gerickson@nuovations.com> Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-06ppc4xx: Unify AMCC's board config files (part 2/3)Stefan Roese
This patch series unifies the AMCC eval board ports by introducing a common include header for all AMCC eval boards: include/configs/amcc-common.h This header now includes all common configuration options/defines which are removed from the board specific headers. The reason for this is ease of maintenance and unified look and feel of all AMCC boards. Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03ppc4xx: Change Kilauea to use the common DDR2 init functionStefan Roese
This patch changes the kilauea and kilauea_nand (for NAND booting) board port to not use a board specific DDR2 init routine anymore. Now the common code from cpu/ppc4xx is used. Thanks to Grant Erickson for all his basic work on this 405EX early bootup. Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03ppc4xx: Enable Primordial Stack for 40x and Unify ECC HandlingGrant Erickson
This patch (Part 2 of 2): * Rolls up a suite of changes to enable correct primordial stack and global data handling when the data cache is used for such a purpose for PPC40x-variants (i.e. CFG_INIT_DCACHE_CS). * Related to the first, unifies DDR2 SDRAM and ECC initialization by eliminating redundant ECC initialization implementations and moving redundant SDRAM initialization out of board code into shared 4xx code. * Enables MCSR visibility on the 405EX(r). * Enables the use of the data cache for initial RAM on both AMCC's Kilauea and Makalu and removes a redundant CFG_POST_MEMORY flag from each board's CONFIG_POST value. - Removed, per Stefan Roese's request, defunct memory.c file for Makalu and rolled sdram_init from it into makalu.c. With respect to the 4xx DDR initialization and ECC unification, there is certainly more work that can and should be done (file renaming, etc.). However, that can be handled at a later date on a second or third pass. As it stands, this patch moves things forward in an incremental yet positive way for those platforms that utilize this code and the features associated with it. Signed-off-by: Grant Erickson <gerickson@nuovations.com> Signed-off-by: Stefan Roese <sr@denx.de>
2008-05-20Big white-space cleanup.Wolfgang Denk
This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-10ppc4xx: Kilauea: Add CONFIG_BOOTP_SUBNETMASK to Kilauea board configMarkus Klotzbücher
When using dhcp/bootp the "netmask" environment variable is not set because CONFIG_BOOTP_SUBNETMASK is not defined. But usually this is desireable, so the following patch adds this this option to the board config. Signed-off-by: Markus Klotzbuecher <mk@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2008-05-08ppc4xx: Kilauea: Fix incorrect FPGA FIFO addressStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2008-04-11ppc4xx: Update Kilauea defconfig to use device-tree booting as defaultStefan Roese
This patch reworks the default environment on Kilauea/Haleakala. Now "net_nfs" for exmaple uses the device-tree style booting formerly know as "net_nfs_fdt". Also the addresses in RAM were changed because of the new image booting support, which check for image overwriting. So the addresses needed togeet adjusted. Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-03Fix quoting problem (preboot setting) in many board config files.Wolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-01-17ppc4xx: Fix remaining CONFIG_COMMANDS in 4xx filesStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2007-12-27ppc4xx: fdt: Cleanup setup of cpu node setupStefan Roese
Now the cpu node setup ("timebase-frequency" and "clock-frequency") is without using the absolute path to the cpu node. This makes it possible to use this U-Boot version with both versions of cpu-node naming "cpu@0" and the former "PowerPC,440EPx@0". Signed-off-by: Stefan Roese <sr@denx.de>
2007-12-27ppc4xx: Bring 4xx fdt support up-to-dateStefan Roese
This patch update the 4xx fdt support. It enabled fdt booting on the AMCC Kilauea and Sequoia for now. More can follow later quite easily. Signed-off-by: Stefan Roese <sr@denx.de>
2007-12-08ppc4xx: 405EX: Correctly enable USB pinsStefan Roese
This patch selects the USB data pins in the 405EX GPIO and MFC (multi function control) registers. This is done for the AMCC Kilauea and Makalu eval boards. Signed-off-by: Stefan Roese <sr@denx.de>
2007-11-27ppc4xx: Kilauea & Makalu: Fix ext IRQ pin multiplexingStefan Roese
After an error in the AMCC 405EX users manual now correctly configure IRQ2 (Kilauea)/IRQ0 (Makalu) as alternate 2 signal for external IRQ usage. Signed-off-by: Stefan Roese <sr@denx.de>
2007-11-26ppc4xx: Kilauea: Configure pin mux to use ext IRQ2 as interruptStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2007-11-17ppc4xx: Update AMCC Kilauea config fileStefan Roese
- Use generic GPIO configuration framework (CFG_4xx_GPIO_TABLE) Signed-off-by: Stefan Roese <sr@denx.de>
2007-11-09ppc4xx: Remove In:/Out:/Err: boot output for AMCC KilaueaStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2007-11-03ppc4xx: Add AMCC Kilauea/Haleakala NAND booting supportStefan Roese
This patch adds NAND booting support for the AMCC 405EX(r) eval boards. Again, only one image supports both targets. Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31ppc4xx: Remove cache definition from 4xx board config filesStefan Roese
All 4xx board config files don't need the cache definitions anymore. These are now defined in common headers. Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31ppc4xx: Add initial AMCC Haleakala PPC405EXr eval board supportStefan Roese
The Haleakala is nearly identical with the Kilauea eval board. The only difference is that the 405EXr only supports one EMAC and one PCIe interface. This patch adds support for the Haleakala board by using the identical image for Kilauea and Haleakala. The distinction is done by comparing the PVR. Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31ppc4xx: Add SNTP support to AMCC Katmai, Kilauea & Makalu boardsStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31ppc: Small Kilauea cleanup of config fileStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>