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Move arch/arm/cpu/armv7/zynq/* -> arch/arm/mach-zynq/*
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Enable SDHCI0 for zynqmp.
Add empty gpio.h because of sdhci requirement.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Provide an option to write filesystem independend commands.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Added the SPI driver support for ZynqMP
The controller is same as zynq SPI controller
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
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Enable the i2c driver for ZynqMP
Also enable the eeprom for read and writes
to eeprom on ZynqMP
ZynqMP uses the same i2c controller as in Zynq
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Add support for loading sw for R5 with enabling for zynqmp.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
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Define the mmu table till 2MB granularity
enable dcaches for zynqmp.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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The PicoZed is a System-on-Module board which is marketed as part of
the ZedBoard/MicroZed/etc. collection. It includes a Zynq-7000
processor.
This patch adds support that covers all the variants of the PicoZed
including the SKUs with Z7010/Z7020 and Z7015/Z7030 Zynq chips. This
patch set however only covers support for the System-on-Module and does
not cover any extra components that are available on carrier boards
(except those that are fanned out of the module itself).
More information on this board, its variants and available carrier
boards is available at: http://zedboard.org/product/picozed
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Enable GPIO driver and GPIO commands.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Instead of hardcoding the 'fdtfile' variable, let's detect the SoC and
board variant on the fly and change the dtb name.
Based on the scheme done on am335x board.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-By: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
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README file suggests to use 'fdtfile' for the dtb file name and
'fdt_addr_r' for the dtb address in RAM, so do as suggested.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
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This patch adds esdhc support for ls2085a.
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
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Enable NAND boot support using SPL framework. To boot from
NAND, either use DIP switches on board, or "qixis_reset nand"
command. Details of forming NAND image can be found in README.
Signed-off-by: Scott Wood <scottwood@freescale.com>
[York Sun: Remove +S from defconfig after commit 252ed872]
Signed-off-by: York Sun <yorksun@freescale.com>
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This adds NAND boot support for LS2085AQDS, using SPL framework.
Details of forming NAND image can be found in README.
Signed-off-by: Scott Wood <scottwood@freescale.com>
[York Sun: Remove +S from defconfig after commit 252ed872]
Signed-off-by: York Sun <yorksun@freescale.com>
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Add support of ethernet:
- eth.c: mapping lane to slot for (0x2A, 0x07)
- ls2085a.c: To enable/disable dpmac and get link type
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
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Enable USB support on Toradex Colibri Vybrid Modules.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
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This adds initial support for Colibri VF50/VF61 based on Freescale
Vybrid SoC.
- CPU clocked at 396/500 MHz
- DDR3 at 396MHz
- for VF50, use PLL2 as memory clock (synchronous mode)
- for VF61, use PLL1 as memory clock (asynchronous mode)
- Console on UART0 (Colibri UART_A)
- Ethernet on FEC1
- PLL5 based RMII clocking (E.g. No external crystal)
- UART_A and UART_C I/O muxing
- Boot from NAND by default
Tested on Colibri VF50/VF61 booting using serial loader over UART.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Acked-by: Stefan Agner <stefan@agner.ch>
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Add architecture-specific u-boot.lds and remove all board-specific
u-boot.lds.
All the .text customization that was board-specific have been
moved inside the related include/configs, inside a
LDS_BOARD_TEXT define.
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
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Implemented fb_set_reboot_flag() for OMAP5 to set
an environment variable 'dofastboot' when reboot-bootloader called.
This environment variable will be checked in boot command and fastboot
will be called if the variable is set.
If the bootcmd env variable of OMAP5 common is overwritten with board-specific
command, then these changes will not apply.
This was originally intended for DRA7 platform, but now applies to all OMAP5.
Ref:
http://git.omapzoom.org/?p=repo/u-boot.git;a=commit;h=19da2e436e9806259cf1f4988b9e046ab256bf2c
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
Signed-off-by: Dileep Katta <dileep.katta@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Make it check for !CONFIG_ENV_IS_NOWHERE as we can't saveenv()
in that case]
Signed-off-by: Tom Rini <trini@konsulko.com>
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- Fastboot is enable by default for DRA7XX
- This is based on following patch modified accordingly
http://git.omapzoom.org/?p=repo/u-boot.git;a=commit;h=b2e04f92b5d91c708b6fd6b79d2266966ac51f4b
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
Signed-off-by: Dileep Katta <dileep.katta@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
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Signed-off-by: Peter Howard <phoward@gme.net.au>
[trini: Add config file, update for ..._ether_addr() -> ..._ethaddr() rename]
Signed-off-by: Tom Rini <trini@konsulko.com>
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The LS2085ARDB is a evaluation platform that supports LS2085A
family SoCs. This patch add sbasic support for the platform.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
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The LS2085AQDS is an evaluatoin platform that supports the LS2085A
family SoCs. This patch add basic support of the platform.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
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Changed MC firmware loading to comply with the new MC boot architecture.
Flush D-cache hierarchy after loading MC images. Add environment
variables "mcboottimeout" for MC boot timeout in milliseconds,
"mcmemsize" for MC DRAM block size. Check MC boot status before calling
flib functions.
Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
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Add support of SerDes framework for Layerscape Architecture.
- Add support of 2 SerDes block
- Add SerDes protocol parsing and detection
- Create table of SerDes protocol supported by LS2085A
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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The timer clock is system clock divided by 4, not fixed 12MHz.
This is common to the SoC, not board specific. Primary core is
fixed when u-boot still runs in board_f. Secondary cores are
fixed by reading a variable set by u-boot.
Signed-off-by: York Sun <yorksun@freescale.com>
CC: Mark Rutland <mark.rutland@arm.com>
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ls2085a_common.h contains hard-coded information for NOR/NAND flash,
I2C, DDR, etc. These are platform specific. Move them out of common
header file and placed into respective board header files.
Move TEXTBASE to 1MB offset to fit NOR flash with up to 1MB sector
size.
Enable command auto complete. Update prompt symbol. Set fdt_high to
0xa0000000 because Linux requires that the fdt be 8-byte aligned
and below 512 MiB. Besides ensuring compliance with the 512 MiB
limit, this avoids problems with the dtb being misaligned within
the FIT image.
Change the MC FW, MC DPL and Debug server NOR addresses in compliance
with the NOR flash layouts for 128MB flash.
Add PCIe macros. Enable "loadb" command. Disable debug server.
Enable workaround for erratum A008511.
Stop reset on panic for postmortem debugging.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
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Some SoCs have more than two I2C busses. Instead of adding ifdef
to the driver, macros are put into board header file where
CONFIG_SYS_I2C_MXC is defined.
Signed-off-by: York Sun <yorksun@freescale.com>
CC: Heiko Schocher <hs@denx.de>
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Increase malloc length for more than 2M.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
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Switch to CONFIG_ARCH_INTEGRATOR defined by Kconfig.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
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The board/SoC select menu in arch/arm/Kconfig is still cluttered.
Add ARCH_INTEGRATOR into arch/arm/Kconfig and move the board select
under arch/arm/mach-integrator.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
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Commit d8bafe1310487ba0e0785997726b4792072178d3
"ARMv8: enable DM in vexpress64 board" only enabled DM
for the simulated vexpress64 board (FVP) with the
hardcoded clock value for the simulated board, causing
a console regression on the Juno board which was using
a different clock setting.
Fix this by enabling DM for all vexpress64 boards,
defining the clock frequency per-board, deleting the
static array of PL01x ports from the config file and
relying solely on the port defined in the boardfile
using platform data.
Cc: David Feng <fenghua@phytium.com.cn>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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The NAND-version has been become a bit orphan.
Now we need to reactivate it, so bring necessary things:
- loading devicetree
- switch control signal to correct pins
- setup pinmux
- default-environment
up to date.
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
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Signed-off-by: Kamil Lulko <rev13@wp.pl>
Reviewed-by: Tom Rini <trini@konsulko.com>
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Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
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This patch extracts all baseboard specific defines into a separate config file.
This makes it easier to add other baseboards that use the TQMa6 SoM.
This patch will be used by the upcoming WRU-IV board support which also
uses the TQMa6 SoM.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Markus Niebel <Markus.Niebel@tq-group.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-By: Markus Niebel <Markus.Niebel@tq-group.com>
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Added support in default boot scripts to find kernel/dtbs on a boot volume
separate from rootfs volume.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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We have encountered many USB storage devices that require more warm-up
than the spec allows for.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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Enable the 'i2c edid' command to query and display data from an attached
HDMI monitor of LVDS display with an EDID device.
Example:
Ventana > i2c dev 2 && i2c edid 0x50
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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Set the initrd_high env so that ramdisk range can be properly set.
See commit 7e9603e and README
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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Add support for the USB mass storage gadget to enable access to on-board
storage.
Example:
Ventana > ums 0 mmc 0 # provide ums access to the uSD
Ventana > ums 0 usb 0 # provide ums access to the first USB device
Ventana > ums 0 sata 0 # provide ums access to an mSATA device
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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Gateworks Ventana boards don't all use IMX6 FEC, so lets define default
ethprime based off the first detected device.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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I've encountered issues when using 4k packets through certain switches. For
now disable this and go back to using MTU size packets.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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