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Enable full 48-bit LBA48 data reads by passing the upper word of the
LBA block pointer in bytes 9 and 10 of the FIS.
This allows uboot to load data from any arbitrary sector on a drive
with 2 or more TB of available data connected to an AHCI controller.
Signed-off-by: Mark Langsdorf <mark.langsdorf@gmail.com>
Signed-off-by: Andre Przywara <osp@andrep.de>
[trini: Make use of CONFIG_SYS_64BIT_LBA in a few places to drop
warnings on platforms that don't enable that feature ]
Signed-off-by: Tom Rini <trini@konsulko.com>
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Enable IO delay recalibration sequence.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
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Enabling IO delay recalibration sequence for DRA7 EVM.
UART and I2C are configured before IO delay recalibration sequence
as these are used earlier and safe to use.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
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Drop the code that doesn't use driver model for USB.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Move this over to Kconfig and tidy up.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Allow SPL to be built with this option so that we can support device tree
control. Disable the simple bus for now in SPL. It may be needed later.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This option is used by some boards, so support it with driver model. This
is really ugly - we should rewrite this driver once all users are moved to
driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
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We try to avoid typedefs and these ones are easy enough to remove. Before
changing this header in the next patch, remove the typedefs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Joe Hershberger <joe.hershberger@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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This function is used before jumping to U-Boot, but in that case we don't
always want to disable caches.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
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For secure boot systems it is common to have a read-only U-Boot which starts
the machine and jumps to a read-write U-Boot for actual booting the OS. This
allows the read-write U-Boot to be upgraded without risk of permanently
bricking the machine. In the event that the read-write U-Boot is corrupted,
the read-only U-Boot can detect this with a checksum and boot into a
recovery flow.
To support this, add a way to detect when U-Boot is run from SPL as opposed
to some other method, such as booted directly (no SPL) or started from
another source (e.g. a primary U-Boot). This works by putting a special value
in r0.
For now we rely on board-specific code to actually check the register and
set a flag. At some point this could be generalised, perhaps by using a spare
register and passing a flag to _main and/or board_init_f().
This commit does not implement any feature, but merely provides the API for
boards to implement.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Add the legacy i2c_reg_read/write() functions to the compatibility layer
so that they can be used when CONFIG_DM_I2C_COMPAT is defined.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
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Due to absence of CONFIG_SYS_64BIT_LBA, u-boot-sunxi currently has
no support for the (GPT) partioning scheme of large disks > 2TB.
While the AHCI driver seems to handle this nicely, the problem is
that lbaint_t values get truncated to 32-bit.
This patch sets CONFIG_SYS_64BIT_LBA from sunxi_common.h for all
SoCs that support AHCI (CONFIG_SUNXI_AHCI).
Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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We need to match the device tree in the FIT with the U-Boot model so we
can automatically select the right device tree. Also adjust the load address
so that the device tree is not in the way when a zImage kernel tries to
extract itself.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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Bring these in if they are provided by the board.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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When setting up large environment variables we can exceed 16 arguemnts.
Increase this to avoid problems.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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Enable the EC and keyboard, using the SPI bus.
The EC driver requires a particular format and a deactivation delay. Also
U-Boot does not support interrupts.
For now, adjust the device tree to comply. At some point we should tidy
this up to support interrupts and make tegra and exynos use the same setup.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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This requires a change to stdin to include the 'cros-ec-keyb' input device.
Put this in the common file, enabled by the relevant CONFIG.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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AM335x-based 'Gumstix Pepper' SBCs and variants use different types of
RAM (DDR2 vs DDR3 with DDR3 being the default). Detect the board type
by reading the factory-programmed EEPROM [1] and use this to select any
runtime boot options such as RAM type.
[1] http://elinux.org/BeagleBoardPinMux#List_of_Vendor_and_Device_IDs
Signed-off-by: Adam YH Lee <adam.yh.lee@gmail.com>
Signed-off-by: Ash Charles <ashcharles@gmail.com>
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This patch adds the feature to only stop the autobooting, and therefor
boot into the U-Boot prompt, when the input string / password matches
a values that is encypted via a SHA256 hash and saved in the environment.
This feature is enabled by defined these config options:
CONFIG_AUTOBOOT_KEYED
CONFIG_AUTOBOOT_STOP_STR_SHA256
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
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This patch moves the following config options to Kconfig:
CONFIG_AUTOBOOT_KEYED
CONFIG_AUTOBOOT_PROMPT
CONFIG_AUTOBOOT_DELAY_STR
CONFIG_AUTOBOOT_STOP_STR
AUTOBOOT_KEYED_CTRLC
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Drop ip04 and pm9263 configs/ additions, those boards previously
set CONFIG_AUTOBOOT_PROMPT but never used it, re-run savedefconfig over
all boards that did change. Make digsy_mtc_* string include seconds to
match others and not warn. ]
Signed-off-by: Tom Rini <trini@konsulko.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
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Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Acked-by: Stefan Agner <stefan@agner.ch>
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Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
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Commit 8183058188cd2d942 ("imx6: centralise common boot options in
mx6_common.h") broke boot on mx6sl and mx6sx by assuming that all mx6
SoCs use the same LOADADDR/SYS_TEXT_BASE range, which is not correct.
DDR on mx6sx/mx6sl starts at 0x80000000.
Adjust LOADADDR/SYS_TEXT_BASE to the proper values for mx6sx/mx6sl,
so that these SoCs can boot again.
Also, TQMA6 requires a custom CONFIG_SYS_TEXT_BASE value, so move
its setting prior to the inclusion of mx6_common.h.
Signed-off-by: Fabio Estevam <fabio.estevam at freescale.com>
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There are two revisions of wandboard: version B1 and C1.
Add the revision detection support, so that the correct dtb file can
be automatically loaded.
Based on the patch from Richard Hu <hakahu@gmail.com>.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Tested-By: Vagrant Cascadian <vagrant@aikidev.net>
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This instroduces comments that explain the purpose, parameters and return codes
of a few fdt support functions, that are used to fill the fdt.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Acked-by: Simon Glass <sjg@chromium.org>
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Before device-tree, the device serial number used to be passed to the kernel
using ATAGs (on ARM). This is now deprecated and all the handover to the kernel
should now be done using device-tree. Thus, this passes the serial-number
property to the kernel using the serial-number property of the root node, as
expected by the kernel.
The serial number is a string that somewhat represents the device's serial
number. It might come from some form of storage (e.g. an eeprom) and be
programmed at factory-time by the manufacturer or come from identification
bits available in e.g. the SoC.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Simon Glass <sgj@chromium.org>
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Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Tidy up the sort order again.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Joe Hershberger <joe.hershberger@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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For some reason 'u-boot -D' does not restore the terminal correctly when
the 'reset' command is used. Call the terminal restore function explicitly
in this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
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Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr>
Acked-by: Simon Glass <sjg@chromium.org>
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Every pin can be configured now from the device tree. A dt-bindings
has been added to describe the different property available.
Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975
Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr>
Acked-by: Simon Glass <sjg@chromium.org>
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Support QEMU PIRQ routing via device tree on both i440fx and q35
platforms. With this commit, Linux booting on QEMU from U-Boot
has working ATA/SATA, USB and ethernet.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
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The default weak version of pci_skip_dev() in drivers/pci/pci_common.c
skips the host bridge (b.d.f = 0.0.0) which is actually the i440fx/q35
chipset for QEMU targets. Define CONFIG_PCI_CONFIG_HOST_BRIDGE to make
it visible in the PCI configuration space.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
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Intel Quark SoC has the same interrupt routing mechanism as the
Queensbay platform, only the difference is that PCI devices'
INTA/B/C/D are harcoded and cannot be changed freely.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
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PIRQ routing is pretty much common in Intel chipset. It has several
PIRQ links (normally 8) and corresponding registers (either in PCI
configuration space or memory-mapped IBASE) to configure the legacy
8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing
support using device tree and move it to a common place, so that we
can easily add PIRQ routing support on a new platform.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
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Enable legacy IDE support on the pc target and AHCI support on the
q35 target. Default configuration is to support the pc target.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
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Enable CONFIG_LBA48 to support large disks. CONFIG_ATAPI is only needed
by cmd_ide.c which is not common for modern x86 targets, hence remove it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
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It turns out that QEMU x86 emulated graphic card has a built-in
option ROM which can be run perfectly with native mode by U-Boot.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
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CONFIG_FRAMEBUFFER_SET_VESA_MODE and CONFIG_FRAMEBUFFER_VESA_MODE
are not x86-specific, so move them to drivers/video/Kconfig and
make them depend on VIDEO_VESA driver. Some cosmetic fixes are
applied to the Kconfig help text as well.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
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Some x86 boards set CONFIG_NR_DRAM_BANKS to 1, which causes incorrect
DRAM size printed when booting from coreboot, like this:
CPU: x86, vendor Intel, device 663h
DRAM: 636 KiB
Using default environment
Change it to 8 which should be enough for both coreboot and bare
cases, and move it to x86-common.h.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
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