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2012-09-07nand: Try to align the default buffersSimon Glass
The NAND layer needs to use cache-aligned buffers by default. Towards this goal. align the default buffers and their members according to the minimum DMA alignment defined for the architecture. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Scott Wood <scottwood@freescale.com>
2012-09-05Merge remote-tracking branch 'u-boot-ti/master' into mAlbert ARIBAUD
2012-09-05OMAP3: mt_ventoux: added video supportStefano Babic
Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-09-05OMAP3: mt_ventoux: activate GPIO4Stefano Babic
Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-09-05OMAP3: tam3517: add function to read MAC from EEPROMStefano Babic
The manufacturer delivers the TAM3517 SOM with 4 MAC address. They are stored on the EEPROM of the SOM. The patch adds a function to get their values and set the ethaddr variables. Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-09-04Merge remote-tracking branch 'u-boot-atmel/master' into mAlbert ARIBAUD
2012-09-04Fixes the crippled console output on PortuxG20.Markus Hubig
In order to use the serial interface on the PortuxG20 we need to enable the level converter first by setting the PC9 pin to high. The level converter needs some time to settle so we have to use the mdelay() function to wait for some time. Unfortunately we have no timers available at board_early_init_f() so we enable the serial output early within board_postclk_init(). Now the U-Boot output looks fine: | U-Boot 2012.07-00132-gaf1a3b0-dirty (Aug 16 2012 - 18:21:32) | | CPU: AT91SAM9G20 | Crystal frequency: 18.432 MHz | CPU clock : 396.288 MHz | Master clock : 132.096 MHz | DRAM: 64 MiB | WARNING: Caches not enabled | NAND: 128 MiB | In: serial | Out: serial | Err: serial | Net: macb0 | Hit any key to stop autoboot: 0 Signed-off-by: Markus Hubig <mhubig@imko.de> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-04atmel: eb_cpux9k2: add ram target configurationJens Scharsig
* add ram target for EB+CPUx9k2 board (eb_cpux9k2_ram_config) Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de> Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-04integrator: break out common configLinus Walleij
The configuration that is common for all Integrator boards may just as well be stored in a common include file as per pattern from other boards. This eases maintenance quite a bit. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-09-03arm/km: remove unused codeHolger Brunck
For some reasons we had an own implementaion of dram_init and dram_init_banksize. This is not needed anymore, use the standard kirkwood functions instead. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Gerlando Falauto <gerlando.falauto@keymile.com> Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
2012-09-03arm/km: fix frequency of the SPI NOR FlashValentin Longchamp
According to our last HW measures, this could be raised while still compatible with the potential delays on the lines. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
2012-09-03km/arm: set SPI NOR Flash default parametersValentin Longchamp
These parameters are used by the the sf probe command that are used by our update script and they therefore need to be set for all of our boards. The timing is the same as for the ENV SPI NOR Flash (since it's the same physical device) and takes the boco2 delay on the bus into account. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
2012-09-03edminiv2: orion5x: fix GPIO inits and valuesAlbert ARIBAUD
Orion5x did not actually write GPIO output values or input polarities, and ED Mini V2 had bad or missing values for GPIO settings. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
2012-09-01at91: 9x5: Enable PMECC for 5series ek board.Wu, Josh
Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01at91: atmel_nand: extract HWECC initialization code into one function: ↵Wu, Josh
atmel_hw_nand_init_param(). This patch 1. extract the hwecc initialization code into one function. It is a preparation for adding atmel PMECC support. 2. enable CONFIG_SYS_NAND_SELF_INIT. Which make us can configurate the ecc parameters between nand_scan_ident() and nand_scan_tail(). Signed-off-by: Josh Wu <josh.wu@atmel.com> [fix empty newline at EOF error and move return value check into ifdef] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01atmel: at91sam9x5: add spi flash boot supportBo Shen
Add at91sam9x5 series spi flash boot support Using at91sam9x5ek_spiflash to configure, then it can boot from at25df321 serial flash SPI mater work in 30Mhz speed, while not 1Mhz speed. This will base on atmel_spi patch, or else, it will occur receive overrun Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01arm: sam9g10/sam9m10g45: remove CONFIG_ARCH_CPU_INITBo Shen
Remove CONFIG_ARCH_CPU_INIT for at91sam9g10ek and at91sam9m10g45ek Signed-off-by: Bo Shen <voice.shen@atmel.com> [rebase on TOT] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01at91sam9263ek: fix 'update' scriptAndreas Bießmann
The old update script uses 'load_addr' which is never set. Use 'fileaddr' instead which is automagically set by e.g. dhcp. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> cc: Stelian Pop <stelian@popies.net>
2012-09-01ARM : at91sam9x5 : Remove CONFIG_ARCH_CPU_INITBo Shen
Remove CONFIG_ARCH_CPU_INIT, no need it anymore Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01fsl_esdhc: Remove cache snooping for i.MXBenoît Thébaudeau
The cache snooping feature of Freescale's eSDHC IP is not available on i.MX, so disable it globally for this architecture. This avoids setting no_snoop for all i.MX boards, and it prevents setting a reserved bit of a reserved register if fsl_esdhc_mmc_init() is used on i.MX, like in arch/arm/cpu/armv7/imx-common/cpu.c/cpu_mmc_init(). Since no_snoop was only used on i.MX, get rid of it BTW. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Kim Phillips <kim.phillips@freescale.com>
2012-09-01efikamx: move and rename Efika MX directories and config files to prepare ↵Matt Sealey
for new boards * Move Efika MX Smarttop and Smartbook boards into a "genesi" vendor directory * Rename efikamx -> mx51_efikamx since there is an mx53_efikamx and mx6_efikamx to come Signed-off-by: Matt Sealey <matt@genesi-usa.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01MX28: m28evk: Enable SPI DMAMarek Vasut
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
2012-09-01MX28: m28evk: Align SSP clock speedMarek Vasut
Align the SSP clock speed with oscilator to achieve higher transfer stability. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
2012-09-01imx27lite: update with gpio api change (v4)trem
Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr> Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01MX: Set a common gpio.h for all i.MXStefano Babic
Each i.MX has its own gpio.h, defining the same structure. The internal GPIO controller has the same layout (at least for the register used by u-boot) and can be shared. Signed-off-by: Stefano Babic <sbabic@denx.de> Tested-by: Matt Sealey <matt@genesi-usa.com>
2012-09-01mx28evk: Remove unneeded 'undef'Fabio Estevam
There is no need to undef an option that is not enabled by default. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01MX28: Move "regs-base.h" include after SoC type configurationOtavio Salvador
For i.MX233 addition the base registers need to be change so the SoC definition needs to be known before the header include. The following boards has been changed: * apx4devkit * m28evk * mx28evk * sc_sps_1 Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01mx53evk: add boot_mode supportTroy Kisky
This allows a watchdog reset to start the ROM's usb/serial downloader, or boot from an sdcard. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2012-09-01mx6qsabrelite: add boot_mode supportTroy Kisky
This allows a watchdog reset to start the ROM's usb downloader, or boot from an sdcard. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2012-09-01apx4devkit: Turn on cachesFabio Estevam
Turn on data and instruction caches. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> include/configs/apx4devkit.h | 2 -- 1 files changed, 0 insertions(+), 2 deletions(-) Acked-by: Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com>
2012-09-01m28evk: Turn on cachesFabio Estevam
Turn on data and instruction caches. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-09-01arm:cache:trats: Enable PL310 L2 Cache Controller at TRATS Samsung boardŁukasz Majewski
Enable the PL310 L2 cache controller at TRATS Samsung board. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-09-01video: add dp_enabled variable in vidinfo structureDonghwa Lee
To support display port in exynos fb driver, added dp_enabled variable in vidinfo structure that set in board file. Signed-off-by: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-09-01arm:trats: loaduimage environment variable defied for TRATS targetŁukasz Majewski
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-09-01SMDK5250: Enable UART and MMC for Exynos5250 Rev 1.0Rajeshwari Shinde
This patch sets UART3 and MMC channle 0 for Exynos5250 Rev 1.0 Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-09-01SMDK5250: Add smdk5250-uboot-spl.ldsRajeshwari Shinde
Default spl/u-boot-spl.lds created by spl/Makefile resolves the spl text load addr to 0x0. As 0x0 belongs to iROM addr so Global variables can not be used. Adding specific smdk5250-uboot-spl.lds makes possible to use Global Variables in spl. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-09-01ARM: Remove unused stack and irq config definesRob Herring
CONFIG_STACKSIZE is not referenced anywhere except on AVR32, but present in most ARM board config files. IRQs are only enabled for 1 config, so remove the unused config options for IRQ and FIQ stack size as well. Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2012-09-01tegra20: enable SPL for tegra20 boardsAllen Martin
Add SPL options to tegra20 config files and enable SPL build for tegra20 boards. Also remove redundant code from u-boot that is not contained in SPL. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-01tegra20: tec: add tegra20-common-post.hAllen Martin
Add tegra20-common-post.h to be consistent with other tegra20 boards. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-01tegra20: rename CONFIG_MACH_TEGRA_GENERICAllen Martin
Rename CONFIG_MACH_TEGRA_GENERIC to the less confusing CONFIG_TEGRA. The meaning of the config options is now: CONFIG_TEGRA - Any tegra chip CONFIG_TEGRA20 - A tegra20 family chip CONFIG_TEGRA30 - A tegra30 family chip (not added yet) Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-01tegra20: rename tegra2 -> tegra20Allen Martin
This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-01ARM: add Raspberry Pi model B board, using BCM2835 SoCStephen Warren
The Raspberry Pi model B uses the BCM2835 SoC, has 256MB of RAM, contains an SMSC 9512 USB LAN/Hub chip, and various IO connectors. For more details, see http://www.raspberrypi.org/. Various portions (cache enable, MACH_TYPE setup, RAM size limit, stack relocation to top of RAM) extracted from work by: Oleksandr Tymoshenko <gonzo@bluezbox.com>. GPIO driver enablement by Vikram Narayanan <vikram186@gmail.com>. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Tom Rini <trini@ti.com>
2012-09-01u8500: Separating mmc config parameters from driverJohn Rigby
Configuration in vexpress and u8500.v1 is different from what is needed in u8500.v2. As such, card configuration specifics need to reside in the board file rather than the driver. Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01snowball: applying power to LAN and GBF controllersMathieu J. Poirier
LAN and GBF need to be powered explicitely, doing so with interface to AB8500 companion chip. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: John Rigby <john.rigby@linaro.org>
2012-09-01snowball: Adding architecture dependent initialisationMathieu J. Poirier
Enabling timers and clocks in PRCMU and cleaning up mailbox. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: John Rigby <john.rigby@linaro.org>
2012-09-01snowball: Add support for ux500 based snowball boardMathieu J. Poirier
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: John Rigby <john.rigby@linaro.org> Acked-by: Tom Rini <trini@ti.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Conflicts: drivers/gpio/Makefile
2012-09-01da8xx/hawkboard: Add support for ohci host controllerSughosh Ganu
Also enable the ohci port on hawkboard. These additions result in an increased u-boot size -- adjust the same accordingly in the board's config. Move the usb header for da8xx platforms under arch-davinci. Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
2012-09-01omap4/5/am33xx: Make lowlevel_init available to all armv7 platformsTom Rini
Make the lowlevel_init function that these platforms have which just sets up the stack and calls a C function available to all armv7 platforms. As part of this we change some of the macros that are used to be more clear. Previously (except for am335x evm) we had been setting CONFIG_SYS_INIT_SP_ADDR to a series of new defines that are equivalent to simply referencing NON_SECURE_SRAM_END. On am335x evm we should have been doing this initially and do now. Cc: Sricharan R <r.sricharan@ti.com> Tested-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am335x evm: Enable support for spi0Tom Rini
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01sc_sps_1: Adjust board config to use 'mxs' SoC codeOtavio Salvador
Fix build failure due the move of mx28 code to 'mxs' SoC. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Stefano Babic <sbabic@denx.de>
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