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Before this commit, CONFIG_MPC8260 and CONFIG_8260
were used mixed-up.
All boards with mpc8260 cpu defined both of them:
- CONFIG_MPC8260 was defined in board config headers
and include/common.h
- CONFIG_8260 was defined arch/powerpc/cpu/mpc8260/config.mk
We do not need to have both of them.
This commit keeps only CONFIG_MPC8260.
This commit does:
- Delete CONFIG_8260 and CONFIG_MPC8260 definition
in config headers and include/common.h
- Rename CONFIG_8260 to CONFIG_MPC8260
in arch/powerpc/cpu/mpc8260/config.mk.
- Rename #ifdef CONFIG_8260 to #ifdef CONFIG_MPC8260
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
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All mips32 boards define CONFIG_MIPS32 in config headers
except malta boards which define it in boards.cfg.
We can consolidate them by defining it in
arch/mips/cpu/mips32/config.mk.
CONFIG_MIPS64 definition can be moved to
arch/mips/cpu/mips64/config.mk as well.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Acked-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Before this commit, USE_PRIVATE_LIBGCC was defined in
arch-specific config.mk and referenced in
arch/$(ARCH)/lib/Makefile.
We are not happy about parsing config.mk again and again.
We have to keep the same behavior with a different way.
By adding "CONFIG_" prefix, this macro appears
in include/autoconf.mk, include/spl-autoconf.mk.
(And treating USE_PRIVATE_LIBGCC as CONFIG macro
is reasonable enough.)
Tegra SoC family defined USE_PRIVATE_LIBGCC as "yes"
in arch/arm/cpu/arm720t/tegra*/config.mk,
whereas did not define it in arch/arm/cpu/armv7/tegra*/config.mk.
It means Tegra enables PRIVATE_LIBGCC only for SPL.
We can describe the same behavior by adding
#ifdef CONFIG_SPL_BUILD
# define CONFIG_USE_PRIVATE_LIBGCC
#endif
to include/configs/tegra-common.h.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
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Many (but not all) of Blackfin boards give -O2 option
to compile under lib/ directory.
That means lib/ should be speed-optimized,
whereas other parts should be size-optimized.
We want to keep the same behavior,
but do not want to parse board/*/config.mk again and again.
We've got no choice but to invent a new method.
CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED, if it is enabled,
gives -O2 flag only for building under lib/ directory.
Dirty codes which I had marked as "FIX ME"
in board/${BOARD}/config.mk have been deleted.
Instead, CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED has been
defined in include/configs/${BOARD}.h.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Sonic Zhang <sonic.zhang@analog.com>
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Signed-off-by: Vasili Galka <vasili@visionmap.com>
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As ppc4xx currently only supports the deprecated nand_spl infrastructure
and nobody seems to have time / resources to port this over to the newer
SPL infrastructure, lets remove NAND booting completely.
This should not affect the "normal", non NAND-booting ppc4xx platforms
that are currently supported.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Tirumala Marri <tmarri@apm.com>
Cc: Matthias Fuchs <matthias.fuchs@esd.eu>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
Tested-by: Matthias Fuchs <matthias.fuchs@esd.eu>
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The unit-test for hush's "test -e" currently relies upon being run in
the U-Boot build directory, because it tests for the existence of a file
that exists in that directory.
Fix this by explicitly creating the file we use for the existence test,
and deleting it afterwards so that multiple successive unit-test
invocations succeed. This required adding an os.c function to erase
files.
Reported-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
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omap_elm.h is a generic header used by OMAP ELM driver for all TI platfoms.
Hence this file should be present in generic folder instead of architecture
specific include folder.
Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5
Signed-off-by: Pekon Gupta <pekon@ti.com>
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omap_gpmc.h is a generic header used by OMAP NAND driver for all TI platfoms.
Hence this file should be present in generic folder instead of architecture
specific include folder.
Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5
Signed-off-by: Pekon Gupta <pekon@ti.com>
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OMAP NAND driver can detect Page-size and OOB-size of NAND device from ONFI
params or nand_id[] table. And based on that it defines ECC layout.
This patch
1) removes following board configs used for defining NAND ECC layout
- GPMC_NAND_ECC_LP_x16_LAYOUT (for large page x16 NAND)
- GPMC_NAND_ECC_LP_x8_LAYOUT (for large page x8 NAND)
- GPMC_NAND_ECC_SP_x16_LAYOUT (for small page x16 NAND)
- GPMC_NAND_ECC_SP_x8_LAYOUT (for small page x8 NAND)
2) removes unused #defines in common omap_gpmc.h depending on above configs
Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5
Signed-off-by: Pekon Gupta <pekon@ti.com>
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Add 64-bit data for memory commands, such as md, mw, mm, cmp. The new
size ".q " is introduced.
For 64-bit architecture, 64-bit data is enabled by default, by detecting
compiler __LP64__. It is optional for other architectures.
Signed-off-by: York Sun <yorksun@freescale.com>
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Convert sandbox over to use driver model GPIOs.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Add driver model support for GPIOs. Since existing GPIO drivers do not use
driver model, this feature must be enabled by CONFIG_DM_GPIO. After all
GPO drivers are converted over we can perhaps remove this config.
Tests are provided for the sandbox implementation, and are a sufficient
sanity check for basic operation.
The GPIO uclass understands the concept of named banks of GPIOs, with each
GPIO device providing a single bank. Within each bank the GPIOs are numbered
using an offset from 0 to n-1. For example a bank named 'b' with 20
offsets will provide GPIOs named b0 to b19.
Anonymous GPIO banks are also supported, and are just numbered without any
prefix.
Each time a GPIO driver is added to the uclass, the GPIOs are renumbered
accordinging, so there is always a global GPIO numbering order.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Pavel Herrmann <morpheus.ibis@gmail.com>
Signed-off-by: Viktor Křivák <viktor.krivak@gmail.com>
Signed-off-by: Tomas Hlavacek <tmshlvck@gmail.com>
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As an example of how to write a uclass and a driver, provide a demo version
of each, accessible through the 'demo' command.
To use these with driver model, define CONFIG_CMD_DEMO and CONFIG_DM_DEMO.
The two demo drivers are enabled with CONFIG_DM_DEMO_SIMPLE and
CONFIG_DM_DEMO_SHAPE.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Pavel Herrmann <morpheus.ibis@gmail.com>
Signed-off-by: Viktor Křivák <viktor.krivak@gmail.com>
Signed-off-by: Tomas Hlavacek <tmshlvck@gmail.com>
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This command is not required for driver model operation, but can be useful
for testing. It provides simple dumps of internal data structures.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Pavel Herrmann <morpheus.ibis@gmail.com>
Signed-off-by: Viktor Křivák <viktor.krivak@gmail.com>
Signed-off-by: Tomas Hlavacek <tmshlvck@gmail.com>
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Add some tests of driver model functionality. Coverage includes:
- basic init
- binding of drivers to devices using platform_data
- automatic probing of devices when referenced
- availability of platform data to devices
- lifecycle from bind to probe to remove to unbind
- renumbering within a uclass when devices are probed/removed
- calling driver-defined operations
- deactivation of drivers when removed
- memory leak across creation and destruction of drivers/uclasses
- uclass init/destroy methods
- automatic probe/remove of children/parents when needed
This function is enabled for sandbox, using CONFIG_DM_TEST.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Use driver model in sandbox to permit running of driver model unit test.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Add driver model functionality for generic board.
This includes data structures and base code for registering devices and
uclasses (groups of devices with the same purpose, e.g. all I2C ports will
be in the same uclass).
The feature is enabled with CONFIG_DM.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Pavel Herrmann <morpheus.ibis@gmail.com>
Signed-off-by: Viktor Křivák <viktor.krivak@gmail.com>
Signed-off-by: Tomas Hlavacek <tmshlvck@gmail.com>
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U-Boot now uses errors defined in include/errno.h which are negative
integers. Commands which fail need to report the error and return 1
to indicate failure. Add this functionality in cmd_process_error().
For now this merely reports the error number. It would be possible
also to produce a helpful error message by storing the error strings
in U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Add support for building a device tree for sandbox's CONFIG_OF_HOSTFILE
option to make it easier to use device tree with sandbox.
This adjusts the Makefile to build a u-boot.dtb file which can be passed
to sandbox U-Boot with:
./u-boot -d u-boot.dtb
Signed-off-by: Simon Glass <sjg@chromium.org>
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Copied from Linux sources "include/linux/sizes.h" commit
413541dd66d51f791a0b169d9b9014e4f56be13c
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Tom Rini <trini@ti.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Acked-by: Tom Rini <trini@ti.com>
Acked-by: Stefan Roese <sr@denx.de>
[trini: Add bcm Kona platforms to the patch]
Signed-off-by: Tom Rini <trini@ti.com>
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Gem can be directly initialized from DTB.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Disable CONFIG_OF_CONTROL for SPL compilation.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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- Add xilinx_emaclite_of_init to netdev.h
- Remove global data pointer from the driver
- Add better handling for error state.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Conflicts:
arch/arm/cpu/armv7/config.mk
board/ti/am43xx/mux.c
include/configs/am43xx_evm.h
Signed-off-by: Tom Rini <trini@ti.com>
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Remove the last uses of symbol offsets in ARM U-Boot.
Remove some needless uses of _TEXT_BASE.
Remove all _TEXT_BASE definitions.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
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With this, fixup a trivial build error of get_effective_memsize needing
to be updated in the new board/freescale/p1010rdb/spl.c
Signed-off-by: Tom Rini <trini@ti.com>
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Same as the previous commit.
Move sanity check to prepare1 target to avoid nasty troubles.
Before this commit, LDSCRIPT existence was not checked
when it was specified by CONFIG_SYS_LDSCRIPT.
Now LDSCRIPT existence is checked for all boards.
$(wildcard $(LDSCRIPT)) must point to the linker scripts
with absolute path.
Otherwise, make will terminate with a false error
on out-of-tree build.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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u-boot binary size for Freescale mpc8536DS platforms is 512KB.
This has been reached to upper limit of the platforms and causig
linker error. So increase the u-boot binary size to 768KB.
Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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In the previous patches, we introduced the SPL/TPL fraamework.
For SD/SPI flash booting way, we introduce the SPL to enable a loader stub. The
SPL was loaded by the code from the internal on-chip ROM. The SPL initializes
the DDR according to the SPD and loads the final uboot image into DDR, then
jump to the DDR to begin execution.
For NAND booting way, the nand SPL has size limitation on some board(e.g.
P1010RDB), it can not be more than 8KB, we can call it "minimal SPL", So the
dynamic DDR driver doesn't fit into this minimum SPL. We added the TPL that is
loaded by the the minimal SPL. The TPL initializes the DDR according to the SPD
and loads the final uboot image into DDR,then jump to the DDR to begin execution.
This patch enabled SPL/TPL for P1010RDB to support starting from NAND/SD/SPI
flash with SPL framework and initializing the DDR according to SPD in the SPL/TPL.
Because the minimal SPL load the TPL to L2 SRAM and the jump to the L2 SRAM to
execute, so the section .resetvec is no longer needed.
Signed-off-by: Ying Zhang <b40530@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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There was no enough memory for malloc in SPL booting from spi flash, so
relayout the memory in SPL: reduce the memory for global data from 16K
Bytes to 4K Bytes, save the space for malloc.
Signed-off-by: Ying Zhang <b40530@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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There was no enough stack in SPL, so the buffer needed in SPL is to malloc
from memory pool and to repalce the temporary variable.
Signed-off-by: Ying Zhang <b40530@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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1. The SPL's length of SDCARD boot has not enough,expand the SPL's
length to 128K.
2. deleted unused symbol: CONFIG_SYS_RUN_INDDR
Signed-off-by: Ying Zhang <b40530@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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T2081 QDS is a high-performance computing evaluation, development and
test platform supporting the T2081 QorIQ Power Architecture processor.
T2081QDS board Overview
-----------------------
- T2081 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz
- 2MB shared L2 and 512KB L3 CoreNet platform cache (CPC)
- CoreNet fabric supporting coherent and noncoherent transactions with
prioritization and bandwidth allocation
- 32-/64-bit DDR3/DDR3LP SDRAM memory controller with ECC and interleaving
- Ethernet interfaces:
- Two on-board 10M/100M/1G bps RGMII ports
- Two 10Gbps XFI with on-board SFP+ cage
- 1Gbps/2.5Gbps SGMII Riser card
- 10Gbps XAUI Riser card
- Accelerator:
- DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC
- SerDes:
- 8 lanes up to 10.3125GHz
- Supports SGMII, HiGig, XFI, XAUI and Aurora debug,
- IFC:
- 512MB NOR Flash, 2GB NAND Flash, PromJet debug port and Qixis FPGA
- eSPI:
- Three SPI flash (16MB N25Q128A + 16MB EN25S64 + 512KB SST25WF040)
- USB:
- Two USB2.0 ports with internal PHY (one Type-A + one micro Type mini-AB)
- PCIe:
- Four PCI Express controllers (two PCIe 2.0 and two PCIe 3.0 with SR-IOV)
- eSDHC:
- Supports various SD/SDHC/SDXC/eMMC devices with adapter cards and
voltage translators
- I2C:
- Four I2C controllers.
- UART:
- Dual 4-pins UART serial ports
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Rajeshwari Birje <rajeshwari.s@samsung.com>
Cc: Inderpal Singh <inderpal.singh@linaro.org>
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Add support for the bcm28155_ap reference board.
Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Reviewed-by: Steve Rae <srae@broadcom.com>
Reviewed-by: Tim Kryger <tkryger@linaro.org>
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Add bcm281xx architecture support code including a clock framework and
chip reset. Define register block base addresses for the bcm281xx
architecture and create an empty gpio header file required when
CONFIG_CMD_GPIO is set.
Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Reviewed-by: Steve Rae <srae@broadcom.com>
Reviewed-by: Tim Kryger <tkryger@linaro.org>
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Rework rpi_b's bootcmd (and sub-commands) to match Tegra's bootcmd as
much as possible. This will aid in a future patch which will create a
common header e.g. config_distro_bootcmd.h.
While at it, enable booting from extlinux.conf using the sysboot command.
The iteration and componentization currently makes a little more sense
for Tegra than RPi, but I'd still like to keep the two as similar as
possible. USB and networking support is coming to the RPi in due course,
and it'll all make more sense then anyway.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
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Commit 6789e84ecaa8f45d053084e08c381284a04abff7 (i2c, omap24xx:
convert driver to new mutlibus/mutliadapter framework) intended to
make I2C driver compatible with latest changes. It unfortunately has
had a impact on size on SPL as well. For example on SDP4430,
32032 bytes before/MLO
35416 bytes after/MLO
With this mentioned commit, MLO stops booting on SDP4430 as only 32K
is accessible for non-secure (bootloader) s/w on GP devices and the size
increase to 56K fails boot.
On the latest u-boot commit e7be18225fbea76d1f0034b224f0d1e60f07cfcf,
MLO is now at size 35592 bytes, However, I2C is not necessary for SPL
to function as we use SR_I2C for controlling the PMIC.
Disabling I2C reduces MLO to 32224 bytes which allows
OMAP4 GP platform to boot up.
Since this is common for all OMAP4 platforms, remove the need for I2C
for SPL builds in the common config.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Sricharan R <r.sricharan@ti.com>
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Signed-off-by: Tom Rini <trini@ti.com>
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Signed-off-by: Tom Rini <trini@ti.com>
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Signed-off-by: Tom Rini <trini@ti.com>
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With CONFIG_SYS_BOOTMAPSZ defined, recent Linux kernel booting
results in this error:
Booting using the fdt blob at 0x81f00000
Loading Kernel Image ... OK
ERROR: Failed to allocate 0x1189d bytes below 0x80004000.
device tree - allocation error
FDT creation failed! hanging...### ERROR ### Please RESET the board ###
Removing this define solves this issue.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Tom Rini <trini@ti.com>
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Patch allows to load a script at the startup from MMC.
Signed-off-by: Stefano Babic <sbabic@denx.de>
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Patch contains the same fixes as commit
4b9b2c300a23ca4a85811918dc92e822a9571a87
(missing CONFIG_OMAP3_GPIO_2) and commit
f9095aac793aa8917ab9b915c5d449e6dc8d3d30 (missing CONFIG_SPL_NAND_SOFTECC).
Same issues are relevant for the mcx board, too.
Signed-off-by: Stefano Babic <sbabic@denx.de>
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Patch f33b9bd3
[arm: omap3: Enable clocks for peripherals only if they are used]
breaks SPL booting on tao3530. Since some gpio input's are
read to detect the board revision. But with this patch above, the
clocks to the GPIO subsystems are not enabled per default any more.
The GPIO banks need to be configured specifically now.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
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Adds support for Bernecker & Rainer Industrieelektronik GmbH KWB
Motherboard, using TI's AM3352 SoC.
Most of code is derived from TI's AM335x_EVM
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
Cc: trini@ti.com
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Adds support for Bernecker & Rainer Industrieelektronik GmbH T-Series
Motherboard, using TI's AM3352 SoC.
Most of code is derived from TI's AM335x_EVM
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
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