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author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-10-27 14:47:00 (GMT) |
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committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-10-29 08:01:40 (GMT) |
commit | 295326231d1ca8e1e81dbf799a642c5348bc8804 (patch) | |
tree | 9b7619454884be032f9147f883d69d74d4631393 /.travis.yml | |
parent | dd39ee8a545132431b6441135c707e2c49317f8b (diff) | |
download | u-boot-fsl-qoriq-295326231d1ca8e1e81dbf799a642c5348bc8804.tar.xz |
ARM: uniphier: enable SSC for more PLLs for LD20 SoC
For Electro-Magnetic Compatibility.
Set CPLL, SPLL2, MPLL, VPPLL, GPPLL, DPLL* to SSC rate 1 percent.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to '.travis.yml')
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