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| author | Michal Simek <michal.simek@xilinx.com> | 2015-04-15 11:05:06 (GMT) |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2015-04-29 09:19:01 (GMT) |
| commit | 04bc5c939a79c796374ffb93251841317ef8cf6f (patch) | |
| tree | 5fde93d281648bdb65e642d21c7d8e25da7da47b | |
| parent | caacb33fd1f9c270b0f0c878cfca08b56c0b257c (diff) | |
| download | u-boot-fsl-qoriq-04bc5c939a79c796374ffb93251841317ef8cf6f.tar.xz | |
serial: zynq: Add support for slow emulation platform
On slow platforms not all baudrate setting is valid.
Check it directly in the driver and setup maximum possible
frequency.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| -rw-r--r-- | drivers/serial/serial_zynq.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c index 3e2b8dc..9278763 100644 --- a/drivers/serial/serial_zynq.c +++ b/drivers/serial/serial_zynq.c @@ -48,10 +48,16 @@ static void uart_zynq_serial_setbrg(const int port) /* Calculation results. */ unsigned int calc_bauderror, bdiv, bgen; unsigned long calc_baud = 0; - unsigned long baud = gd->baudrate; + unsigned long baud; unsigned long clock = get_uart_clk(port); struct uart_zynq *regs = uart_zynq_ports[port]; + /* Covering case where input clock is so slow */ + if (clock < 1000000 && gd->baudrate > 4800) + gd->baudrate = 4800; + + baud = gd->baudrate; + /* master clock * Baud rate = ------------------ * bgen * (bdiv + 1) |