diff options
author | Lei Xu <B33228@freescale.com> | 2011-04-19 07:28:41 (GMT) |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2011-04-28 03:29:04 (GMT) |
commit | 300097669c705da06e812e517e3b2895814b0310 (patch) | |
tree | fa311d31c654ebc5824ab769c4d12021339d925d | |
parent | 86221f09fb99d37ce5bfceb3ac66ca78f034cb71 (diff) | |
download | u-boot-fsl-qoriq-300097669c705da06e812e517e3b2895814b0310.tar.xz |
powerpc/85xx: Enable ESDHC111 erratum on P2040/P3041/P5010/P5020 SoCs
The workaround for ESDHC111 should also be applied on
P2040/P3041/P5010/P5020 SoCs.
Signed-off-by: Lei Xu <B33228@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
-rw-r--r-- | arch/powerpc/include/asm/config_mpc85xx.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index d93586a..da2e998 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -266,6 +266,7 @@ #define CONFIG_SYS_FM_MURAM_SIZE 0x28000 #define CONFIG_SYS_FSL_USB1_PHY_ENABLE #define CONFIG_SYS_FSL_USB2_PHY_ENABLE +#define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #elif defined(CONFIG_PPC_P3041) #define CONFIG_MAX_CPUS 4 @@ -279,6 +280,7 @@ #define CONFIG_SYS_FM_MURAM_SIZE 0x28000 #define CONFIG_SYS_FSL_USB1_PHY_ENABLE #define CONFIG_SYS_FSL_USB2_PHY_ENABLE +#define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #elif defined(CONFIG_PPC_P4040) #define CONFIG_MAX_CPUS 4 @@ -323,6 +325,7 @@ #define CONFIG_SYS_FM_MURAM_SIZE 0x28000 #define CONFIG_SYS_FSL_USB1_PHY_ENABLE #define CONFIG_SYS_FSL_USB2_PHY_ENABLE +#define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #elif defined(CONFIG_PPC_P5020) #define CONFIG_MAX_CPUS 2 @@ -336,6 +339,7 @@ #define CONFIG_SYS_FM_MURAM_SIZE 0x28000 #define CONFIG_SYS_FSL_USB1_PHY_ENABLE #define CONFIG_SYS_FSL_USB2_PHY_ENABLE +#define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #else #error Processor type not defined for this platform |