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authorMarek Vasut <marex@denx.de>2012-11-24 14:03:21 (GMT)
committerStefano Babic <sbabic@denx.de>2012-12-04 07:52:05 (GMT)
commit3642b1c1478897ea8cb51772df39c2f4b5385477 (patch)
treedf57e9a3a76c0814e588b43786d45d61fdeca8a6
parent1d4fd0dc3b45de7b7a706285845ef5b527422014 (diff)
downloadu-boot-fsl-qoriq-3642b1c1478897ea8cb51772df39c2f4b5385477.tar.xz
mx28: Remove SET, CLR, TOG ops from PLLxCTRL1 registers
These registers don't have _SET, _CLR and _TOG at the respective offsets available, these registers has to be toggled via R-M-W if needed. Thus do not export these offsets anymore. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
-rw-r--r--arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h6
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h b/arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h
index b662fbe..23e9adc 100644
--- a/arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h
+++ b/arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h
@@ -31,9 +31,11 @@
#ifndef __ASSEMBLY__
struct mxs_clkctrl_regs {
mxs_reg_32(hw_clkctrl_pll0ctrl0) /* 0x00 */
- mxs_reg_32(hw_clkctrl_pll0ctrl1) /* 0x10 */
+ uint32_t hw_clkctrl_pll0ctrl1; /* 0x10 */
+ uint32_t reserved_pll0ctrl1[3]; /* 0x14-0x1c */
mxs_reg_32(hw_clkctrl_pll1ctrl0) /* 0x20 */
- mxs_reg_32(hw_clkctrl_pll1ctrl1) /* 0x30 */
+ uint32_t hw_clkctrl_pll1ctrl1; /* 0x30 */
+ uint32_t reserved_pll1ctrl1[3]; /* 0x34-0x3c */
mxs_reg_32(hw_clkctrl_pll2ctrl0) /* 0x40 */
mxs_reg_32(hw_clkctrl_cpu) /* 0x50 */
mxs_reg_32(hw_clkctrl_hbus) /* 0x60 */