diff options
| author | Rajeshwari Shinde <rajeshwari.s@samsung.com> | 2012-10-25 19:49:27 (GMT) |
|---|---|---|
| committer | Minkyu Kang <mk7.kang@samsung.com> | 2012-11-15 12:08:20 (GMT) |
| commit | 6b0884d73a4f6cc5a562a38d9dd5847dd2f98f3f (patch) | |
| tree | 6beccad85d1c084a4715d2eed7c54090ad2fe66e | |
| parent | 75ddfb4ff452458958c08f75333d1cf719493f75 (diff) | |
| download | u-boot-fsl-qoriq-6b0884d73a4f6cc5a562a38d9dd5847dd2f98f3f.tar.xz | |
EXYNOS: Add pinmux for I2S
This patch adds pinmux support for I2S1
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| -rw-r--r-- | arch/arm/cpu/armv7/exynos/pinmux.c | 13 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-exynos/periph.h | 1 |
2 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c index 5796d56..d99daa0 100644 --- a/arch/arm/cpu/armv7/exynos/pinmux.c +++ b/arch/arm/cpu/armv7/exynos/pinmux.c @@ -230,6 +230,16 @@ static void exynos5_i2c_config(int peripheral, int flags) } } +static void exynos5_i2s_config(int peripheral) +{ + int i; + struct exynos5_gpio_part1 *gpio1 = + (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1(); + + for (i = 0; i < 5; i++) + s5p_gpio_cfg_pin(&gpio1->b0, i, GPIO_FUNC(0x02)); +} + static int exynos5_pinmux_config(int peripheral, int flags) { switch (peripheral) { @@ -257,6 +267,9 @@ static int exynos5_pinmux_config(int peripheral, int flags) case PERIPH_ID_I2C7: exynos5_i2c_config(peripheral, flags); break; + case PERIPH_ID_I2S1: + exynos5_i2s_config(peripheral); + break; default: debug("%s: invalid peripheral %d", __func__, peripheral); return -1; diff --git a/arch/arm/include/asm/arch-exynos/periph.h b/arch/arm/include/asm/arch-exynos/periph.h index 082611c..673f4c7 100644 --- a/arch/arm/include/asm/arch-exynos/periph.h +++ b/arch/arm/include/asm/arch-exynos/periph.h @@ -38,6 +38,7 @@ enum periph_id { PERIPH_ID_I2C5, PERIPH_ID_I2C6, PERIPH_ID_I2C7, + PERIPH_ID_I2S1, PERIPH_ID_SDMMC0, PERIPH_ID_SDMMC1, PERIPH_ID_SDMMC2, |