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| author | Simon Glass <sjg@chromium.org> | 2016-03-12 05:07:09 (GMT) |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2016-03-17 02:27:25 (GMT) |
| commit | 6bcb675b2f6a3251d0107673949988c619ec18ec (patch) | |
| tree | bb3ecbbc6c754ed19c78f12c5afc721de7a3eb97 | |
| parent | f7d35bc148de7ebca7f51a07fc9a45715f8e6d29 (diff) | |
| download | u-boot-fsl-qoriq-6bcb675b2f6a3251d0107673949988c619ec18ec.tar.xz | |
x86: Record the CPU details when starting each core
As each core starts up, record its microcode version and CPU ID so these can
be presented with the 'cpu detail' command.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| -rw-r--r-- | arch/x86/cpu/intel_common/microcode.c | 7 | ||||
| -rw-r--r-- | arch/x86/cpu/mp_init.c | 5 | ||||
| -rw-r--r-- | arch/x86/include/asm/microcode.h | 9 |
3 files changed, 20 insertions, 1 deletions
diff --git a/arch/x86/cpu/intel_common/microcode.c b/arch/x86/cpu/intel_common/microcode.c index 3054fab..daf0d69 100644 --- a/arch/x86/cpu/intel_common/microcode.c +++ b/arch/x86/cpu/intel_common/microcode.c @@ -64,8 +64,12 @@ static int microcode_decode_node(const void *blob, int node, return 0; } -static inline uint32_t microcode_read_rev(void) +int microcode_read_rev(void) { + /* Quark does not have microcode MSRs */ +#ifdef CONFIG_INTEL_QUARK + return 0; +#else /* * Some Intel CPUs can be very finicky about the CPUID sequence used. * So this is implemented in assembly so that it works reliably. @@ -90,6 +94,7 @@ static inline uint32_t microcode_read_rev(void) ); return high; +#endif } static void microcode_read_cpu(struct microcode_update *cpu) diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c index ca47e9e..4cc6555 100644 --- a/arch/x86/cpu/mp_init.c +++ b/arch/x86/cpu/mp_init.c @@ -15,6 +15,7 @@ #include <asm/cpu.h> #include <asm/interrupt.h> #include <asm/lapic.h> +#include <asm/microcode.h> #include <asm/mp.h> #include <asm/msr.h> #include <asm/mtrr.h> @@ -560,12 +561,16 @@ int mp_init(struct mp_params *p) int mp_init_cpu(struct udevice *cpu, void *unused) { + struct cpu_platdata *plat = dev_get_parent_platdata(cpu); + /* * Multiple APs are brought up simultaneously and they may get the same * seq num in the uclass_resolve_seq() during device_probe(). To avoid * this, set req_seq to the reg number in the device tree in advance. */ cpu->req_seq = fdtdec_get_int(gd->fdt_blob, cpu->of_offset, "reg", -1); + plat->ucode_version = microcode_read_rev(); + plat->device_id = gd->arch.x86_device; return device_probe(cpu); } diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h index 67f32cc..0478935 100644 --- a/arch/x86/include/asm/microcode.h +++ b/arch/x86/include/asm/microcode.h @@ -18,6 +18,15 @@ * not updates were found, -EINVAL if an update was invalid */ int microcode_update_intel(void); + +/** + * microcode_read_rev() - Read the microcode version + * + * This reads the microcode version of the currently running CPU + * + * @return microcode version number + */ +int microcode_read_rev(void); #endif /* __ASSEMBLY__ */ #endif |