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authorPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>2017-05-31 15:59:32 (GMT)
committerSimon Glass <sjg@chromium.org>2017-06-08 03:30:50 (GMT)
commitf210e5574ff92734220c9c16a33534faa6959255 (patch)
treeec76d5c6f93d23a41cc6787f1dd60306475d84d7
parentcc75afc5d75a686b73e8cd5f9fba56f4b087517b (diff)
downloadu-boot-fsl-qoriq-f210e5574ff92734220c9c16a33534faa6959255.tar.xz
rockchip: video: add mpixelclock settings from Linux driver
The Linux driver now supports higher mpixelclock settings. Add these to rockchip_phy_config[] and rockchip_mpll_cfg[]. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
-rw-r--r--drivers/video/rockchip/rk_hdmi.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/video/rockchip/rk_hdmi.c b/drivers/video/rockchip/rk_hdmi.c
index 0479d6e..2d1b5e7 100644
--- a/drivers/video/rockchip/rk_hdmi.c
+++ b/drivers/video/rockchip/rk_hdmi.c
@@ -36,6 +36,9 @@ static const struct hdmi_phy_config rockchip_phy_config[] = {
.mpixelclock = 297000000,
.sym_ctr = 0x8039, .term = 0x0005, .vlev_ctr = 0x028d,
}, {
+ .mpixelclock = 584000000,
+ .sym_ctr = 0x8039, .term = 0x0000, .vlev_ctr = 0x019d,
+ }, {
.mpixelclock = ~0ul,
.sym_ctr = 0x0000, .term = 0x0000, .vlev_ctr = 0x0000,
}
@@ -61,6 +64,12 @@ static const struct hdmi_mpll_config rockchip_mpll_cfg[] = {
.mpixelclock = 148500000,
.cpce = 0x0051, .gmp = 0x0003, .curr = 0x0000,
}, {
+ .mpixelclock = 272000000,
+ .cpce = 0x0040, .gmp = 0x0003, .curr = 0x0000,
+ }, {
+ .mpixelclock = 340000000,
+ .cpce = 0x0040, .gmp = 0x0003, .curr = 0x0000,
+ }, {
.mpixelclock = ~0ul,
.cpce = 0x0051, .gmp = 0x0003, .curr = 0x0000,
}