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| author | Simon Glass <sjg@chromium.org> | 2016-03-12 05:07:16 (GMT) |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2016-03-17 02:27:25 (GMT) |
| commit | 0adf8d3548c3fe6f577bb0f2a7acd855dced8a83 (patch) | |
| tree | cfa84d30a80b842aa55ae0839be3bc5bcfcab30a /Makefile | |
| parent | 779653b0cbe3f634632bc4ecae1ce5df84638326 (diff) | |
| download | u-boot-fsl-qoriq-0adf8d3548c3fe6f577bb0f2a7acd855dced8a83.tar.xz | |
x86: Add support for running Intel reference code
Intel has invented yet another binary blob which firmware is required to
run. This is run after SDRAM is ready. It is linked to load at a particular
address, typically 0, but is a relocatable ELF so can be moved if required.
Add support for this in the build system. The file should be placed in the
board directory, and called refcode.elf.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'Makefile')
| -rw-r--r-- | Makefile | 14 |
1 files changed, 13 insertions, 1 deletions
@@ -1052,6 +1052,10 @@ ifneq ($(CONFIG_HAVE_VGA_BIOS),) IFDTOOL_FLAGS += -w $(CONFIG_VGA_BIOS_ADDR):$(srctree)/board/$(BOARDDIR)/$(CONFIG_VGA_BIOS_FILE) endif +ifneq ($(CONFIG_HAVE_REFCODE),) +IFDTOOL_FLAGS += -w $(CONFIG_X86_REFCODE_ADDR):refcode.bin +endif + quiet_cmd_ifdtool = IFDTOOL $@ cmd_ifdtool = $(IFDTOOL) -c -r $(CONFIG_ROM_SIZE) u-boot.tmp; ifneq ($(CONFIG_HAVE_INTEL_ME),) @@ -1060,7 +1064,15 @@ endif cmd_ifdtool += $(IFDTOOL) $(IFDTOOL_FLAGS) u-boot.tmp; cmd_ifdtool += mv u-boot.tmp $@ -u-boot.rom: u-boot-x86-16bit.bin u-boot.bin FORCE +refcode.bin: $(srctree)/board/$(BOARDDIR)/refcode.bin FORCE + $(call if_changed,copy) + +quiet_cmd_ldr = LD $@ +cmd_ldr = $(LD) $(LDFLAGS_$(@F)) \ + $(filter-out FORCE,$^) -o $@ + +u-boot.rom: u-boot-x86-16bit.bin u-boot.bin FORCE \ + $(if $(CONFIG_HAVE_REFCODE),refcode.bin) $(call if_changed,ifdtool) OBJCOPYFLAGS_u-boot-x86-16bit.bin := -O binary -j .start16 -j .resetvec |