diff options
| author | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2015-02-20 08:04:10 (GMT) |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2015-02-21 13:23:51 (GMT) |
| commit | 63637a484614490685b68a70bdf93b435c063363 (patch) | |
| tree | aabbe009b7ab77e0d1b7c93373b3d22c8b76be75 /arch/arm/cpu/arm926ejs/versatile/timer.c | |
| parent | 3e93b4e6001104152fec850d4724ea9ffad03e05 (diff) | |
| download | u-boot-fsl-qoriq-63637a484614490685b68a70bdf93b435c063363.tar.xz | |
ARM: versatile: move SoC sources to mach-versatile
Move
arch/arm/cpu/arm926ejs/versatile/* -> arch/arm/mach-versatile/*
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Diffstat (limited to 'arch/arm/cpu/arm926ejs/versatile/timer.c')
| -rw-r--r-- | arch/arm/cpu/arm926ejs/versatile/timer.c | 64 |
1 files changed, 0 insertions, 64 deletions
diff --git a/arch/arm/cpu/arm926ejs/versatile/timer.c b/arch/arm/cpu/arm926ejs/versatile/timer.c deleted file mode 100644 index 5d694d8..0000000 --- a/arch/arm/cpu/arm926ejs/versatile/timer.c +++ /dev/null @@ -1,64 +0,0 @@ -/* - * (C) Copyright 2003 - * Texas Instruments <www.ti.com> - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger@sysgo.de> - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Alex Zuepke <azu@sysgo.de> - * - * (C) Copyright 2002-2004 - * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> - * - * (C) Copyright 2004 - * Philippe Robin, ARM Ltd. <philippe.robin@arm.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> - -#define TIMER_ENABLE (1 << 7) -#define TIMER_MODE_MSK (1 << 6) -#define TIMER_MODE_FR (0 << 6) -#define TIMER_MODE_PD (1 << 6) - -#define TIMER_INT_EN (1 << 5) -#define TIMER_PRS_MSK (3 << 2) -#define TIMER_PRS_8S (1 << 3) -#define TIMER_SIZE_MSK (1 << 2) -#define TIMER_ONE_SHT (1 << 0) - -int timer_init (void) -{ - ulong tmr_ctrl_val; - - /* 1st disable the Timer */ - tmr_ctrl_val = *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8); - tmr_ctrl_val &= ~TIMER_ENABLE; - *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = tmr_ctrl_val; - - /* - * The Timer Control Register has one Undefined/Shouldn't Use Bit - * So we should do read/modify/write Operation - */ - - /* - * Timer Mode : Free Running - * Interrupt : Disabled - * Prescale : 8 Stage, Clk/256 - * Tmr Siz : 16 Bit Counter - * Tmr in Wrapping Mode - */ - tmr_ctrl_val = *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8); - tmr_ctrl_val &= ~(TIMER_MODE_MSK | TIMER_INT_EN | TIMER_PRS_MSK | TIMER_SIZE_MSK | TIMER_ONE_SHT ); - tmr_ctrl_val |= (TIMER_ENABLE | TIMER_PRS_8S); - - *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = tmr_ctrl_val; - - return 0; -} - |