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| author | Marek Vasut <marek.vasut@gmail.com> | 2011-11-08 23:18:23 (GMT) |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2011-11-11 10:36:58 (GMT) |
| commit | 22fe68fbdc6baf4d55782fd9803e6133c49b533d (patch) | |
| tree | 5d24179c8e0e9682dee3abb5351d27887efd7f85 /arch/arm/cpu/arm926ejs | |
| parent | b68d57c310d4d9a5385e7b265b6f93b2fc39857e (diff) | |
| download | u-boot-fsl-qoriq-22fe68fbdc6baf4d55782fd9803e6133c49b533d.tar.xz | |
iMX28: Fix ARM vector handling
This patch introduces proper ARM vector handling for i.MX28 CPU. This issue
wasn't addressed because the interrupts weren't enabled on any ARMv5 core,
therefore the issue wasn't noticed earlier.
In previous implementation, the vectoring code used by i.MX28 CPU when an
exception happened was that of the SPL. With this change, the branch target when
an exception happens can be reconfigured by U-Boot.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Diffstat (limited to 'arch/arm/cpu/arm926ejs')
| -rw-r--r-- | arch/arm/cpu/arm926ejs/mx28/mx28.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/cpu/arm926ejs/mx28/mx28.c b/arch/arm/cpu/arm926ejs/mx28/mx28.c index e990f3c..088c019 100644 --- a/arch/arm/cpu/arm926ejs/mx28/mx28.c +++ b/arch/arm/cpu/arm926ejs/mx28/mx28.c @@ -35,6 +35,8 @@ #include <asm/arch/imx-regs.h> #include <asm/arch/sys_proto.h> +DECLARE_GLOBAL_DATA_PTR; + /* 1 second delay should be plenty of time for block reset. */ #define RESET_MAX_TIMEOUT 1000000 @@ -116,11 +118,31 @@ int mx28_reset_block(struct mx28_register *reg) return 0; } +void mx28_fixup_vt(uint32_t start_addr) +{ + uint32_t *vt = (uint32_t *)0x20; + int i; + + for (i = 0; i < 8; i++) + vt[i] = start_addr + (4 * i); +} + +#ifdef CONFIG_ARCH_MISC_INIT +int arch_misc_init(void) +{ + mx28_fixup_vt(gd->relocaddr); + return 0; +} +#endif + #ifdef CONFIG_ARCH_CPU_INIT int arch_cpu_init(void) { struct mx28_clkctrl_regs *clkctrl_regs = (struct mx28_clkctrl_regs *)MXS_CLKCTRL_BASE; + extern uint32_t _start; + + mx28_fixup_vt((uint32_t)&_start); /* * Enable NAND clock |