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authorOliver Schinagl <oliver@schinagl.nl>2014-10-03 12:16:24 (GMT)
committerHans de Goede <hdegoede@redhat.com>2014-10-24 07:35:37 (GMT)
commit174deb768c65969a3bcdab4dfbcdcb02abe9f09e (patch)
tree4c73883c1ca120fef1f2f26f962d0ada3560f31b /arch/arm/cpu/armv7/sunxi/Makefile
parent93ce1e9dad42e23e5938b601c36172e8baa1b675 (diff)
downloadu-boot-fsl-qoriq-174deb768c65969a3bcdab4dfbcdcb02abe9f09e.tar.xz
ARM: sun6i: Add support for the power reset control module found on the A31
The A31 has a new module called PRCM, or Power, Reset Control Module. This module controls clocks and resets for RTC block modules, and also PLL biasing in the main clock module. This patch adds the register definitions, and also enables the clocks and resets for the RTC block PIO (pin controller) and P2WI (push-pull 2 wire interface) which is used to talk to the PMIC. Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Hans de Goede <hdegoede@redhat.com> [wens@csie.org: spacing fixes reported by checkpatch.pl] [wens@csie.org: Use setbits helper in PRCM init function] [wens@csie.org: rephrase commit message to explain what the hardware supports and what we actually enable] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Diffstat (limited to 'arch/arm/cpu/armv7/sunxi/Makefile')
-rw-r--r--arch/arm/cpu/armv7/sunxi/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile
index e9721b2..f0473d2 100644
--- a/arch/arm/cpu/armv7/sunxi/Makefile
+++ b/arch/arm/cpu/armv7/sunxi/Makefile
@@ -11,6 +11,7 @@ obj-y += timer.o
obj-y += board.o
obj-y += clock.o
obj-y += pinmux.o
+obj-$(CONFIG_SUN6I) += prcm.o
obj-$(CONFIG_SUN4I) += clock_sun4i.o
obj-$(CONFIG_SUN5I) += clock_sun4i.o
obj-$(CONFIG_SUN7I) += clock_sun4i.o