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| author | York Sun <york.sun@nxp.com> | 2016-10-05 01:01:34 (GMT) |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2016-10-06 16:59:11 (GMT) |
| commit | f534b8f5fdabfbe47c9c741864ed52e945afbd27 (patch) | |
| tree | 03b312df0793bf0101c1e472b0c4d2f70fc0be87 /arch/arm/cpu/armv7 | |
| parent | fd6381029dc38aad9ab5b69fe1ea5e6efb3745d2 (diff) | |
| download | u-boot-fsl-qoriq-f534b8f5fdabfbe47c9c741864ed52e945afbd27.tar.xz | |
arm: Move SYS_FSL_SRDS_* and SYS_HAS_SERDES to Kconfig
Move these options to Kconfig and clean up existing uses.
Signed-off-by: York Sun <york.sun@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/cpu/armv7')
| -rw-r--r-- | arch/arm/cpu/armv7/ls102xa/Kconfig | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig index 88983f4..17f1975 100644 --- a/arch/arm/cpu/armv7/ls102xa/Kconfig +++ b/arch/arm/cpu/armv7/ls102xa/Kconfig @@ -1,6 +1,8 @@ config ARCH_LS1021A bool select SYS_FSL_ERRATUM_A010315 + select SYS_FSL_SRDS_1 + select SYS_HAS_SERDES menu "LS102xA architecture" depends on ARCH_LS1021A @@ -23,6 +25,15 @@ config MAX_CPUS config SYS_FSL_ERRATUM_A010315 bool "Workaround for PCIe erratum A010315" +config SYS_FSL_SRDS_1 + bool + +config SYS_FSL_SRDS_2 + bool + +config SYS_HAS_SERDES + bool + config SYS_FSL_IFC_BANK_COUNT int "Maximum banks of Integrated flash controller" depends on ARCH_LS1021A |