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| author | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2015-01-19 13:31:10 (GMT) |
|---|---|---|
| committer | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2015-01-22 15:50:57 (GMT) |
| commit | 448437496b7cb2b7a80d4b3ada9f225506379c5c (patch) | |
| tree | 12dc9f56fd38004aa88e646bd06e4f5983e8f171 /arch/arm/cpu/tegra124-common | |
| parent | 061ae4c0bbe8df9aeedfa4a1e6a6dc122a4c157f (diff) | |
| download | u-boot-fsl-qoriq-448437496b7cb2b7a80d4b3ada9f225506379c5c.tar.xz | |
ARM: UniPhier: fix IECTRL set code for PH1-Pro4
For PH1-Pro4, the bit 6 of the IECTRL must be set. It is the only
available bit in this register. There is no effect of the write
access to the other bits.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Diffstat (limited to 'arch/arm/cpu/tegra124-common')
0 files changed, 0 insertions, 0 deletions