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authorAllen Martin <amartin@nvidia.com>2013-01-29 13:51:25 (GMT)
committerTom Warren <twarren@nvidia.com>2013-02-11 17:35:24 (GMT)
commit7d54f022bbf51f7ad7e48937379705e557591557 (patch)
tree28e8a5ae76ca405b5a8789c55ab637eb2d76108d /arch/arm/cpu
parent8f1b46b10480e7fe140d5656c76f6f6de1739f13 (diff)
downloadu-boot-fsl-qoriq-7d54f022bbf51f7ad7e48937379705e557591557.tar.xz
tegra30: add SBC1 to periph id mapping table
SBC1 is SPI controller 1 on tegra30 Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r--arch/arm/cpu/tegra30-common/clock.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/cpu/tegra30-common/clock.c b/arch/arm/cpu/tegra30-common/clock.c
index ee3c8b1..a93f2c9 100644
--- a/arch/arm/cpu/tegra30-common/clock.c
+++ b/arch/arm/cpu/tegra30-common/clock.c
@@ -290,7 +290,7 @@ static s8 periph_id_to_internal_id[PERIPH_ID_COUNT] = {
/* 40 */
NONE(KFUSE),
- NONE(SBC1), /* SBC1, 0x34, is this SPI1? */
+ PERIPHC_SBC1,
PERIPHC_NOR,
NONE(RESERVED43),
PERIPHC_SBC2,