summaryrefslogtreecommitdiff
path: root/arch/arm/dts
diff options
context:
space:
mode:
authorMeng Dongyang <daniel.meng@rock-chips.com>2017-05-17 10:21:46 (GMT)
committerSimon Glass <sjg@chromium.org>2017-06-07 13:29:21 (GMT)
commitef82a0db5a668135e7050e0495c3883206b07ec2 (patch)
tree9649a4a8c1981efad7bad335e1b0a6561e2d110c /arch/arm/dts
parentd16f514d8c7dfe7da86bfa1da6e4b7215d9eee44 (diff)
downloadu-boot-fsl-qoriq-ef82a0db5a668135e7050e0495c3883206b07ec2.tar.xz
rockchip: dts: rk3328: add ehci and ohci node and enable host0 port
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/dts')
-rw-r--r--arch/arm/dts/rk3328-evb.dts8
-rw-r--r--arch/arm/dts/rk3328.dtsi14
2 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index 01794ed..9920935 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -43,3 +43,11 @@
pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
status = "okay";
};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index 8a98ee3..e1219c3 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -446,6 +446,20 @@
status = "disabled";
};
+ usb_host0_ehci: usb@ff5c0000 {
+ compatible = "generic-ehci";
+ reg = <0x0 0xff5c0000 0x0 0x10000>;
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ usb_host0_ohci: usb@ff5d0000 {
+ compatible = "generic-ohci";
+ reg = <0x0 0xff5d0000 0x0 0x10000>;
+ interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
sdmmc_ext: rksdmmc@ff5f0000 {
compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xff5f0000 0x0 0x4000>;