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| author | Mingkai Hu <mingkai.hu@nxp.com> | 2016-07-05 08:01:55 (GMT) |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2016-07-26 16:02:23 (GMT) |
| commit | b528b9377df0e738c6904a639a1e78810936f825 (patch) | |
| tree | ab3f786883fc5988efad56848cdc65dff803e34f /arch/arm/include/asm/arch-fsl-layerscape/cpu.h | |
| parent | da4d620c90eb6dd9466a89837ab8667048d856e3 (diff) | |
| download | u-boot-fsl-qoriq-b528b9377df0e738c6904a639a1e78810936f825.tar.xz | |
armv8: fsl_lsch2: Add LS1046A SoC support
The LS1046A processor is built on the QorIQ LS series architecture
combining four ARM A72 processor cores with DPAA 1.0 support.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Mihai Bantea <mihai.bantea@freescale.com>
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm/include/asm/arch-fsl-layerscape/cpu.h')
| -rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h index 5fd5e87..e2d96a1 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h @@ -13,6 +13,8 @@ static struct cpu_type cpu_type_list[] = { CPU_TYPE_ENTRY(LS2045A, LS2045A, 4), CPU_TYPE_ENTRY(LS1043A, LS1043A, 4), CPU_TYPE_ENTRY(LS1023A, LS1023A, 2), + CPU_TYPE_ENTRY(LS1046A, LS1046A, 4), + CPU_TYPE_ENTRY(LS1026A, LS1026A, 2), CPU_TYPE_ENTRY(LS2040A, LS2040A, 4), CPU_TYPE_ENTRY(LS1012A, LS1012A, 1), }; |