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author | Tom Rini <trini@ti.com> | 2014-02-21 13:00:22 (GMT) |
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committer | Tom Rini <trini@ti.com> | 2014-02-21 13:00:22 (GMT) |
commit | 4c89a369c7cd6e7ad3adec4601cfa69fec476164 (patch) | |
tree | 79beb1aa83998aa8beb9fe29b5930deb1235d68e /arch/arm/include/asm/arch-mx6 | |
parent | 36ae5cd2a824597b4c53b045ac0f4c1e3b4eaf65 (diff) | |
parent | 9ea09e20376abbca21760ed4ba87d6b5c4df465c (diff) | |
download | u-boot-fsl-qoriq-4c89a369c7cd6e7ad3adec4601cfa69fec476164.tar.xz |
Merge branch 'master' of git://git.denx.de/u-boot-spi
Diffstat (limited to 'arch/arm/include/asm/arch-mx6')
-rw-r--r-- | arch/arm/include/asm/arch-mx6/imx-regs.h | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index c2d210a..1f19727 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -406,10 +406,11 @@ struct cspi_regs { #define MXC_CSPICTRL_CHAN 18 /* Bit position inside CON register to be associated with SS */ -#define MXC_CSPICON_POL 4 -#define MXC_CSPICON_PHA 0 -#define MXC_CSPICON_SSPOL 12 -#ifdef CONFIG_MX6SL +#define MXC_CSPICON_PHA 0 /* SCLK phase control */ +#define MXC_CSPICON_POL 4 /* SCLK polarity */ +#define MXC_CSPICON_SSPOL 12 /* SS polarity */ +#define MXC_CSPICON_CTL 20 /* inactive state of SCLK */ +#if defined(CONFIG_MX6SL) || defined(CONFIG_MX6DL) #define MXC_SPI_BASE_ADDRESSES \ ECSPI1_BASE_ADDR, \ ECSPI2_BASE_ADDR, \ |