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authorKeerthy <j-keerthy@ti.com>2016-11-23 07:55:27 (GMT)
committerTom Rini <trini@konsulko.com>2016-12-04 18:54:50 (GMT)
commitf56e63509985d23e8912beaf3c38b07f7a1b12c6 (patch)
treed0b54ddf7c11a84acedd23b44a044294bccd7119 /arch/arm/include/asm/arch-omap5/clock.h
parent4596cf98cde13d09310eb0cb2a4c1e11c9f2279a (diff)
downloadu-boot-fsl-qoriq-f56e63509985d23e8912beaf3c38b07f7a1b12c6.tar.xz
board: ti: dra71x-evm: Add PMIC support
Add the pmic_data for LP873x PMIC which is used to power up dra71x-evm. Note: As per the DM[1] DRA71x supports only OP_NOM. So, updating the efuse registers only to use OPP_NOM irrespective of any CONFIG_DRA7_<VOLT>_OPP_{NOM,od,high} is defined. [1] http://www.ti.com/product/DRA718/technicaldocuments Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/include/asm/arch-omap5/clock.h')
-rw-r--r--arch/arm/include/asm/arch-omap5/clock.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h
index 57287ff..7ea7199 100644
--- a/arch/arm/include/asm/arch-omap5/clock.h
+++ b/arch/arm/include/asm/arch-omap5/clock.h
@@ -324,6 +324,9 @@
/* Standard offset is 0.5v expressed in uv */
#define PALMAS_SMPS_BASE_VOLT_UV 500000
+/* Offset is 0.73V for LP873x */
+#define LP873X_BUCK_BASE_VOLT_UV 730000
+
/* TPS659038 */
#define TPS659038_I2C_SLAVE_ADDR 0x58
#define TPS659038_REG_ADDR_SMPS12 0x23
@@ -338,6 +341,11 @@
#define TPS65917_REG_ADDR_SMPS2 0x27
#define TPS65917_REG_ADDR_SMPS3 0x2F
+/* LP873X */
+#define LP873X_I2C_SLAVE_ADDR 0x60
+#define LP873X_REG_ADDR_BUCK0 0x6
+#define LP873X_REG_ADDR_BUCK1 0x7
+#define LP873X_REG_ADDR_LDO1 0xA
/* TPS */
#define TPS62361_I2C_SLAVE_ADDR 0x60