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author | Nishanth Menon <nm@ti.com> | 2015-07-27 21:26:06 (GMT) |
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committer | Tom Rini <trini@konsulko.com> | 2015-08-13 00:47:50 (GMT) |
commit | 1bbb556a6a5c0f44d2da32700fce4d279c851e9f (patch) | |
tree | 14d79050cbb4c40d8f5ef4a285d8decac0cf0c36 /arch/arm/include/asm/arch-omap5 | |
parent | a615d0be6a73fc48a22e5662608260fe9b9149ff (diff) | |
download | u-boot-fsl-qoriq-1bbb556a6a5c0f44d2da32700fce4d279c851e9f.tar.xz |
ARM: DRA7/ OMAP5: implement Auxiliary Control Register configuration
Implement logic for ACR(Auxiliary Control Register) configuration using
ROM Code smc service.
Suggested-by: Richard Woodruff <r-woodruff2@ti.com>
Suggested-by: Brad Griffis <bgriffis@ti.com>
Reviewed-by: Brad Griffis <bgriffis@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Diffstat (limited to 'arch/arm/include/asm/arch-omap5')
-rw-r--r-- | arch/arm/include/asm/arch-omap5/sys_proto.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-omap5/sys_proto.h b/arch/arm/include/asm/arch-omap5/sys_proto.h index 6da8297..7fcb783 100644 --- a/arch/arm/include/asm/arch-omap5/sys_proto.h +++ b/arch/arm/include/asm/arch-omap5/sys_proto.h @@ -81,5 +81,6 @@ static inline u32 usec_to_32k(u32 usec) } #define OMAP5_SERVICE_L2ACTLR_SET 0x104 +#define OMAP5_SERVICE_ACR_SET 0x107 #endif |