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author | Sricharan R <r.sricharan@ti.com> | 2013-05-30 03:19:34 (GMT) |
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committer | Tom Rini <trini@ti.com> | 2013-06-10 12:43:10 (GMT) |
commit | f9b814a8e99390d19628bc1b67c9567fc485d918 (patch) | |
tree | 791ab819ecdd0bcb956b12a6004a0d5b63aa2601 /arch/arm/include/asm/arch-omap5 | |
parent | 378bd1fb4e965a10b396140e964740c76c960c70 (diff) | |
download | u-boot-fsl-qoriq-f9b814a8e99390d19628bc1b67c9567fc485d918.tar.xz |
ARM: DRA7xx: Correct the SYS_CLK to 20MHZ
The sys_clk on the dra evm board is 20MHZ.
Changing the configuration for the same.
And also moving V_SCLK, V_OSCK defines to
arch/clock.h for OMAP4+ boards.
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Diffstat (limited to 'arch/arm/include/asm/arch-omap5')
-rw-r--r-- | arch/arm/include/asm/arch-omap5/clock.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h index 6d02835..86d4711 100644 --- a/arch/arm/include/asm/arch-omap5/clock.h +++ b/arch/arm/include/asm/arch-omap5/clock.h @@ -284,4 +284,12 @@ * into microsec and passing the value. */ #define CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC 31219 + +#ifdef CONFIG_DRA7XX +#define V_OSCK 20000000 /* Clock output from T2 */ +#else +#define V_OSCK 19200000 /* Clock output from T2 */ +#endif + +#define V_SCLK V_OSCK #endif /* _CLOCKS_OMAP5_H_ */ |