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author | Lokesh Vutla <lokeshvutla@ti.com> | 2013-05-30 03:19:38 (GMT) |
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committer | Tom Rini <trini@ti.com> | 2013-06-10 12:43:10 (GMT) |
commit | 97405d843ece2a53e67b801e02ee42005d26e172 (patch) | |
tree | 13c4b866c44ebbbb7033f7490921fcb6dffa6004 /arch/arm/include/asm/omap_common.h | |
parent | 7f36c88f64ee1affd4db78b2c2f4a616abceb84c (diff) | |
download | u-boot-fsl-qoriq-97405d843ece2a53e67b801e02ee42005d26e172.tar.xz |
ARM: DRA7xx: clocks: Update PLL values
Update PLL values.
SYS_CLKSEL value for 20MHz is changed to 2. In other platforms
SYS_CLKSEL value 2 represents reserved. But in sys_clk array
ind 1 is used for 13Mhz. Since other platforms are not using
13Mhz, reusing index 1 for 20MHz.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Diffstat (limited to 'arch/arm/include/asm/omap_common.h')
-rw-r--r-- | arch/arm/include/asm/omap_common.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index f33f28b..d5daa27 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -29,7 +29,7 @@ #include <common.h> -#define NUM_SYS_CLKS 8 +#define NUM_SYS_CLKS 7 struct prcm_regs { /* cm1.ckgen */ @@ -303,6 +303,7 @@ struct prcm_regs { /* l4 wkup regs */ u32 cm_abe_pll_ref_clksel; u32 cm_sys_clksel; + u32 cm_abe_pll_sys_clksel; u32 cm_wkup_clkstctrl; u32 cm_wkup_l4wkup_clkctrl; u32 cm_wkup_wdtimer1_clkctrl; |