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authorKever Yang <kever.yang@rock-chips.com>2017-02-13 09:38:59 (GMT)
committerSimon Glass <sjg@chromium.org>2017-03-16 22:03:44 (GMT)
commit2adb981207b06d93633c1a546f882dbb4dc260e4 (patch)
tree40b50a0e2c191e1169a97d082ad69898b14de56e /arch/arm/include
parent6657f664180632dc352210ee87369d857037b0b1 (diff)
downloadu-boot-fsl-qoriq-2adb981207b06d93633c1a546f882dbb4dc260e4.tar.xz
rockchip: arm64: rk3399: syscon addition for rk3399
rk3399 has different syscon registers which may used in spl, add to support rk3399 spl. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Added rockchip tag: Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/arch-rockchip/clock.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-rockchip/clock.h b/arch/arm/include/asm/arch-rockchip/clock.h
index 6f7e755..b06bb6c 100644
--- a/arch/arm/include/asm/arch-rockchip/clock.h
+++ b/arch/arm/include/asm/arch-rockchip/clock.h
@@ -17,6 +17,8 @@ enum {
ROCKCHIP_SYSCON_SGRF,
ROCKCHIP_SYSCON_PMU,
ROCKCHIP_SYSCON_PMUGRF,
+ ROCKCHIP_SYSCON_PMUSGRF,
+ ROCKCHIP_SYSCON_CIC,
};
/* Standard Rockchip clock numbers */