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authorJiandong Zheng <jdzheng@broadcom.com>2014-08-02 03:37:15 (GMT)
committerTom Rini <trini@ti.com>2014-08-30 11:46:39 (GMT)
commit2d66a0fd58ac8623b3eea01e31b7917a20f287c1 (patch)
tree386bb771df5bd4614ea9afa1c02d660f8522fdd6 /arch/arm/include
parentfafbc6c000db1196b72ec5acf24f0763a6b4493a (diff)
downloadu-boot-fsl-qoriq-2d66a0fd58ac8623b3eea01e31b7917a20f287c1.tar.xz
arm: bcm281xx: Add Ethernet Clock support
Enable Ethernet clock when Broadcom StarFighter2 Ethernet block (CONFIG_BCM_SF2_ETH) is enabled. Signed-off-by: Jiandong Zheng <jdzheng@broadcom.com> Signed-off-by: Steve Rae <srae@broadcom.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/arch-bcm281xx/sysmap.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-bcm281xx/sysmap.h b/arch/arm/include/asm/arch-bcm281xx/sysmap.h
index 880b4e0..350e7f6 100644
--- a/arch/arm/include/asm/arch-bcm281xx/sysmap.h
+++ b/arch/arm/include/asm/arch-bcm281xx/sysmap.h
@@ -9,6 +9,9 @@
#define BSC1_BASE_ADDR 0x3e016000
#define BSC2_BASE_ADDR 0x3e017000
#define BSC3_BASE_ADDR 0x3e018000
+#define DWDMA_AHB_BASE_ADDR 0x38100000
+#define ESUB_CLK_BASE_ADDR 0x38000000
+#define ESW_CONTRL_BASE_ADDR 0x38200000
#define GPIO2_BASE_ADDR 0x35003000
#define KONA_MST_CLK_BASE_ADDR 0x3f001000
#define KONA_SLV_CLK_BASE_ADDR 0x3e011000