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authorHelmut Raiger <helmut.raiger@hale.at>2011-10-12 21:08:30 (GMT)
committerAnatolij Gustschin <agust@denx.de>2011-10-13 10:27:24 (GMT)
commitf00291985b231c5c1f05fc6d09488001d22ae7e3 (patch)
tree6a06a5fc8593457c2d1d3db5c3189a5972d72197 /arch/arm/include
parent02ae1a1860af28164b41e0b29e53e1a1ee913225 (diff)
downloadu-boot-fsl-qoriq-f00291985b231c5c1f05fc6d09488001d22ae7e3.tar.xz
mx31: make HSP clock for mx3fb driver available
This additionally updates mx31/generic.c by - replacing __REG() macro accesses with readl() and writel() - providing macros for PDR0 and PLL bit accesses Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/arch-mx31/clock.h1
-rw-r--r--arch/arm/include/asm/arch-mx31/imx-regs.h14
2 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-mx31/clock.h b/arch/arm/include/asm/arch-mx31/clock.h
index cc99a75..2e3bce2 100644
--- a/arch/arm/include/asm/arch-mx31/clock.h
+++ b/arch/arm/include/asm/arch-mx31/clock.h
@@ -30,6 +30,7 @@ enum mxc_clock {
MXC_IPG_PERCLK,
MXC_CSPI_CLK,
MXC_UART_CLK,
+ MXC_IPU_CLK
};
unsigned int mxc_get_clock(enum mxc_clock clk);
diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h b/arch/arm/include/asm/arch-mx31/imx-regs.h
index 0dcd9fe..f263e6bc 100644
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -513,6 +513,20 @@ enum iomux_pins {
#define PLL_MFI(x) (((x) & 0xf) << 10)
#define PLL_MFN(x) (((x) & 0x3ff) << 0)
+#define GET_PDR0_CSI_PODF(x) (((x) >> 23) & 0x1ff)
+#define GET_PDR0_PER_PODF(x) (((x) >> 16) & 0x1f)
+#define GET_PDR0_HSP_PODF(x) (((x) >> 11) & 0x7)
+#define GET_PDR0_NFC_PODF(x) (((x) >> 8) & 0x7)
+#define GET_PDR0_IPG_PODF(x) (((x) >> 6) & 0x3)
+#define GET_PDR0_MAX_PODF(x) (((x) >> 3) & 0x7)
+#define GET_PDR0_MCU_PODF(x) ((x) & 0x7)
+
+#define GET_PLL_PD(x) (((x) >> 26) & 0xf)
+#define GET_PLL_MFD(x) (((x) >> 16) & 0x3ff)
+#define GET_PLL_MFI(x) (((x) >> 10) & 0xf)
+#define GET_PLL_MFN(x) (((x) >> 0) & 0x3ff)
+
+
#define WEIM_ESDCTL0 0xB8001000
#define WEIM_ESDCFG0 0xB8001004
#define WEIM_ESDCTL1 0xB8001008