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author | Bryan Wu <pengw@nvidia.com> | 2016-08-11 22:28:27 (GMT) |
---|---|---|
committer | Tom Warren <twarren@nvidia.com> | 2016-08-15 17:26:14 (GMT) |
commit | 027638d3cf6bf55996b50e41faccd51789a04eb0 (patch) | |
tree | 762e6006d4bd69a5d01889aedb9f971957df3a02 /arch/arm/mach-tegra/cpu.h | |
parent | 06264a79b4ed8155e8746dba10b707d588ca6e9c (diff) | |
download | u-boot-fsl-qoriq-027638d3cf6bf55996b50e41faccd51789a04eb0.tar.xz |
ARM: tegra: reduce CSITE clock from 204M to 136M
The L4T kernel complains about a CSITE clock rate above 144MHz, presumably
because the HW is only characterized for a clock less than that. Adjust the
rate to 136MHz to avoid the warning and stay in spec.
Signed-off-by: Bryan Wu <pengw@nvidia.com>
(swarren, re-wrote commit description)
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/cpu.h')
-rw-r--r-- | arch/arm/mach-tegra/cpu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/cpu.h b/arch/arm/mach-tegra/cpu.h index 3f38969..1154f8b 100644 --- a/arch/arm/mach-tegra/cpu.h +++ b/arch/arm/mach-tegra/cpu.h @@ -16,7 +16,7 @@ #elif defined(CONFIG_TEGRA30) || defined(CONFIG_TEGRA114) || \ defined(CONFIG_TEGRA124) || defined(CONFIG_TEGRA210) #define NVBL_PLLP_KHZ 408000 -#define CSITE_KHZ 204000 +#define CSITE_KHZ 136000 #else #error "Unknown Tegra chip!" #endif |