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author | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2015-02-26 17:26:50 (GMT) |
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committer | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2015-02-28 15:02:32 (GMT) |
commit | f267b81e20da095539c7da7103afbd1e1b39b20b (patch) | |
tree | 7906924bec9d975cecac373147638e3555a2c0aa /arch/arm/mach-uniphier/include/mach/sc-regs.h | |
parent | 27eac5df175be016a391cedf37cf5a076d279cf8 (diff) | |
download | u-boot-fsl-qoriq-f267b81e20da095539c7da7103afbd1e1b39b20b.tar.xz |
ARM: UniPhier: rename SC_CLKCTRL_CLK_* to SC_SCLKCTRL_CEN_*
Follow the register macros in the LSI specification book.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Diffstat (limited to 'arch/arm/mach-uniphier/include/mach/sc-regs.h')
-rw-r--r-- | arch/arm/mach-uniphier/include/mach/sc-regs.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-uniphier/include/mach/sc-regs.h b/arch/arm/mach-uniphier/include/mach/sc-regs.h index 1197bb5..7726530 100644 --- a/arch/arm/mach-uniphier/include/mach/sc-regs.h +++ b/arch/arm/mach-uniphier/include/mach/sc-regs.h @@ -47,12 +47,12 @@ #define SC_RSTCTRL3 (SC_BASE_ADDR | 0x2008) #define SC_CLKCTRL (SC_BASE_ADDR | 0x2104) -#define SC_CLKCTRL_CLK_ETHER (0x1 << 12) -#define SC_CLKCTRL_CLK_MIO (0x1 << 11) -#define SC_CLKCTRL_CLK_UMC (0x1 << 4) -#define SC_CLKCTRL_CLK_NAND (0x1 << 2) -#define SC_CLKCTRL_CLK_SBC (0x1 << 1) -#define SC_CLKCTRL_CLK_PERI (0x1 << 0) +#define SC_CLKCTRL_CEN_ETHER (0x1 << 12) +#define SC_CLKCTRL_CEN_MIO (0x1 << 11) +#define SC_CLKCTRL_CEN_UMC (0x1 << 4) +#define SC_CLKCTRL_CEN_NAND (0x1 << 2) +#define SC_CLKCTRL_CEN_SBC (0x1 << 1) +#define SC_CLKCTRL_CEN_PERI (0x1 << 0) /* System reset control register */ #define SC_IRQTIMSET (SC_BASE_ADDR | 0x3000) |