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authorÁlvaro Fernández Rojas <noltari@gmail.com>2017-04-24 22:39:20 (GMT)
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>2017-05-10 14:16:09 (GMT)
commitee422142f454d54f0ed39a2cbf083ff12e98a3e1 (patch)
treeba1a8bc79898349405ecd9955001be20548a4d1d /arch/mips/mach-bmips/Kconfig
parent193030e5916960f101e1ba406510980452bc47b6 (diff)
downloadu-boot-fsl-qoriq-ee422142f454d54f0ed39a2cbf083ff12e98a3e1.tar.xz
MIPS: add initial infrastructure for Broadcom MIPS SoCs
CFE checks CPU Thread in a different way (using register $22): mfc0 t1, C0_BCM_CONFIG, 3 # $22 li t2, CP0_CMT_TPID # (1 << 31) and t1, t2 bnez t1, 2f # if we are running on thread 1, skip init nop Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/mips/mach-bmips/Kconfig')
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1 files changed, 23 insertions, 0 deletions
diff --git a/arch/mips/mach-bmips/Kconfig b/arch/mips/mach-bmips/Kconfig
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+menu "Broadcom MIPS platforms"
+ depends on ARCH_BMIPS
+
+config SYS_SOC
+ default "none"
+
+choice
+ prompt "Boot mode"
+
+config BMIPS_BOOT_RAM
+ bool "RAM boot"
+ depends on BMIPS_SUPPORTS_BOOT_RAM
+ help
+ This builds an image that is linked to a RAM address. It can be used
+ for booting from CFE via TFTP using an ELF image, but it can also be
+ booted from RAM by other bootloaders using a BIN image.
+
+endchoice
+
+config BMIPS_SUPPORTS_BOOT_RAM
+ bool
+
+endmenu