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authorPaul Burton <paul.burton@imgtec.com>2017-04-30 19:22:41 (GMT)
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>2017-05-12 11:29:50 (GMT)
commited048e7c763ac9b7043c989ba3081d7a52e4f68e (patch)
tree2bed431f74809dfb459c07935778056d97cb1223 /arch/mips
parent939a255a671fb50549848505a4b44369cbe08efd (diff)
downloadu-boot-fsl-qoriq-ed048e7c763ac9b7043c989ba3081d7a52e4f68e.tar.xz
boston: Move CM GCRs away from flash
Move the MIPS Coherence Manager (CM) Global Configuration Registers (GCRs) away from the region of the physical address space which the Boston board's parallel flash is found in, such that we can access all of flash without clobbering GCRs. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 77d1ac6..07488fe 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -224,6 +224,7 @@ config ROM_EXCEPTION_VECTORS
config MIPS_CM_BASE
hex "MIPS CM GCR Base Address"
depends on MIPS_CM
+ default 0x16100000 if TARGET_BOSTON
default 0x1fbf8000
help
The physical base address at which to map the MIPS Coherence Manager