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author | Matthias Fuchs <matthias.fuchs@esd.eu> | 2013-08-07 10:10:38 (GMT) |
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committer | Tom Rini <trini@ti.com> | 2013-08-20 15:35:24 (GMT) |
commit | 3fb858891273945ce2238e6d4dac3363a1fb0853 (patch) | |
tree | ee86943cebf490244fed648f69425438c3c39b95 /arch/powerpc/include/asm/ppc4xx-ebc.h | |
parent | fb8f4fd3af6602320525894964ea5acd42fe51b8 (diff) | |
download | u-boot-fsl-qoriq-3fb858891273945ce2238e6d4dac3363a1fb0853.tar.xz |
ppc4xx: Remove support for PPC405CR CPUs
This patch removes support for the APM 405CR CPU.
This CPU is EOL and no board uses this chip.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Diffstat (limited to 'arch/powerpc/include/asm/ppc4xx-ebc.h')
-rw-r--r-- | arch/powerpc/include/asm/ppc4xx-ebc.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/powerpc/include/asm/ppc4xx-ebc.h b/arch/powerpc/include/asm/ppc4xx-ebc.h index 9eb50ee..32062fd 100644 --- a/arch/powerpc/include/asm/ppc4xx-ebc.h +++ b/arch/powerpc/include/asm/ppc4xx-ebc.h @@ -14,12 +14,12 @@ * Within this group there is a slight variation concerning the bit field * position of the EMPL and EMPH fields: */ -#if defined(CONFIG_405CR) || defined(CONFIG_405GP) || \ +#if defined(CONFIG_405GP) || \ defined(CONFIG_405EP) || \ defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ defined(CONFIG_440EPX) || defined(CONFIG_440GRX) #define CONFIG_EBC_PPC4xx_IBM_VER1 -#if defined(CONFIG_405CR) || defined(CONFIG_405GP) || \ +#if defined(CONFIG_405GP) || \ defined(CONFIG_405EP) #define EBC_CFG_EMPH_POS 8 #define EBC_CFG_EMPL_POS 6 @@ -32,7 +32,7 @@ /* * Define the max number of EBC banks (chip selects) */ -#if defined(CONFIG_405CR) || defined(CONFIG_405GP) || \ +#if defined(CONFIG_405GP) || \ defined(CONFIG_405EZ) || \ defined(CONFIG_440GP) || defined(CONFIG_440GX) #define EBC_NUM_BANKS 8 |