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author | Kumar Gala <galak@kernel.crashing.org> | 2011-01-13 08:58:23 (GMT) |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2011-01-14 07:32:22 (GMT) |
commit | f133796da8ec87ccbafc9c492636def619d99401 (patch) | |
tree | dfe191877ff5f37f22a28496b911f6fd8863c3ef /arch/powerpc/include | |
parent | 868da5936e40b8685c813c1eb31eed629eaae295 (diff) | |
download | u-boot-fsl-qoriq-f133796da8ec87ccbafc9c492636def619d99401.tar.xz |
powerpc/85xx: Add the workaround for erratum ELBC-A001 (enable on P4080)
Simultaneous FCM and GPCM or UPM operation may erroneously trigger bus
monitor timeout. Set timeout to maximum to avoid.
Based on a patch from Lan Chunhe <b25806@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include')
-rw-r--r-- | arch/powerpc/include/asm/fsl_lbc.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h index c504732..8695a62 100644 --- a/arch/powerpc/include/asm/fsl_lbc.h +++ b/arch/powerpc/include/asm/fsl_lbc.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2004-2008,2010 Freescale Semiconductor, Inc. + * Copyright (C) 2004-2008,2010-2011 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -295,6 +295,8 @@ void lbc_sdram_init(void); #define LBCR_EPAR_SHIFT 16 #define LBCR_BMT 0x0000FF00 #define LBCR_BMT_SHIFT 8 +#define LBCR_BMTPS 0x0000000F +#define LBCR_BMTPS_SHIFT 0 /* LCRR - Clock Ratio Register */ |