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authorVadim Bendebury <vbendeb@chromium.org>2012-10-23 18:04:33 (GMT)
committerSimon Glass <sjg@chromium.org>2012-12-06 22:30:38 (GMT)
commit6dbe0cce3ffce8db8cffad7a16487ef9e3c95021 (patch)
tree4dcd6ab8fc2cf03072a0a6fa18c8bab295cd5398 /arch/x86/cpu/coreboot/Makefile
parent2f899e03a94cac4b092e4c013c6afda73178cc9f (diff)
downloadu-boot-fsl-qoriq-6dbe0cce3ffce8db8cffad7a16487ef9e3c95021.tar.xz
x86: Enable coreboot timestamp facility support in u-boot.
This change turns on the code which allows u-boot to add timestamps to the timestamp table created by coreboot. Since u-boot does not use the tsc_t like structure to represent HW counter readings, this structure is being replaced by 64 bit integer. The timestamp_init() function is now initializing the base timer value used by u-boot to calculate the HW counter increments. Timestamp facility is initialized as soon as the timestamp table pointer is found in the coreboot table. The u-boot generated timer events' ID will start at 1000 to clearly separate u-boot events from coreboot events in the timer trace. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/cpu/coreboot/Makefile')
-rw-r--r--arch/x86/cpu/coreboot/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/cpu/coreboot/Makefile b/arch/x86/cpu/coreboot/Makefile
index 2afd30c..4612a3e 100644
--- a/arch/x86/cpu/coreboot/Makefile
+++ b/arch/x86/cpu/coreboot/Makefile
@@ -37,6 +37,7 @@ COBJS-$(CONFIG_SYS_COREBOOT) += coreboot.o
COBJS-$(CONFIG_SYS_COREBOOT) += tables.o
COBJS-$(CONFIG_SYS_COREBOOT) += ipchecksum.o
COBJS-$(CONFIG_SYS_COREBOOT) += sdram.o
+COBJS-$(CONFIG_SYS_COREBOOT) += timestamp.o
COBJS-$(CONFIG_PCI) += pci.o
SOBJS-$(CONFIG_SYS_COREBOOT) += coreboot_car.o