diff options
| author | Simon Glass <sjg@chromium.org> | 2016-01-17 23:11:25 (GMT) |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2016-01-24 04:08:17 (GMT) |
| commit | 709b1902d212a037a57bac77817aee4ed5481050 (patch) | |
| tree | 03afe4753e2a808d35ca76fccdbc19dccde10801 /arch/x86/cpu/ivybridge | |
| parent | 9d156b57257cfbf2b5343e5c9cbb4111dee4291f (diff) | |
| download | u-boot-fsl-qoriq-709b1902d212a037a57bac77817aee4ed5481050.tar.xz | |
x86: ivybridge: Set up the thermal target correctly
This uses a non-existent node at present. It should use the first CPU node.
The referenced property does not exist (the correct value is the default of
0), but this allows the follow-on init to complete.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/cpu/ivybridge')
| -rw-r--r-- | arch/x86/cpu/ivybridge/model_206ax.c | 21 |
1 files changed, 10 insertions, 11 deletions
diff --git a/arch/x86/cpu/ivybridge/model_206ax.c b/arch/x86/cpu/ivybridge/model_206ax.c index 6ab6ede..a217954 100644 --- a/arch/x86/cpu/ivybridge/model_206ax.c +++ b/arch/x86/cpu/ivybridge/model_206ax.c @@ -283,18 +283,13 @@ static void configure_c_states(void) msr_write(MSR_PP1_CURRENT_CONFIG, msr); } -static int configure_thermal_target(void) +static int configure_thermal_target(struct udevice *dev) { int tcc_offset; msr_t msr; - int node; - /* Find pointer to CPU configuration */ - node = fdtdec_next_compatible(gd->fdt_blob, 0, - COMPAT_INTEL_MODEL_206AX); - if (node < 0) - return -ENOENT; - tcc_offset = fdtdec_get_int(gd->fdt_blob, node, "tcc-offset", 0); + tcc_offset = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "tcc-offset", + 0); /* Set TCC activaiton offset if supported */ msr = msr_read(MSR_PLATFORM_INFO); @@ -403,7 +398,7 @@ static void configure_mca(void) static unsigned ehci_debug_addr; #endif -static int model_206ax_init(void) +static int model_206ax_init(struct udevice *dev) { int ret; @@ -445,7 +440,7 @@ static int model_206ax_init(void) configure_misc(); /* Thermal throttle activation offset */ - ret = configure_thermal_target(); + ret = configure_thermal_target(dev); if (ret) { debug("Cannot set thermal target\n"); return ret; @@ -468,6 +463,10 @@ static int model_206ax_init(void) static int model_206ax_get_info(struct udevice *dev, struct cpu_info *info) { + msr_t msr; + + msr = msr_read(IA32_PERF_CTL); + info->cpu_freq = ((msr.lo >> 8) & 0xff) * SANDYBRIDGE_BCLK * 1000000; info->features = 1 << CPU_FEAT_L1_CACHE | 1 << CPU_FEAT_MMU; return 0; @@ -481,7 +480,7 @@ static int model_206ax_get_count(struct udevice *dev) static int cpu_x86_model_206ax_probe(struct udevice *dev) { if (dev->seq == 0) - model_206ax_init(); + model_206ax_init(dev); return 0; } |