x86: Write configuration tables in last_stage_init()

We can write the configuration table in last_stage_init() for all x86
boards, but not with coreboot since coreboot already has them.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

1 files changed, 49 insertions, 0 deletions

diff --git a/arch/x86/include/asm/tables.h b/arch/x86/include/asm/tables.h
new file mode 100644
index 0000000..8146ba3
--- /dev/null
+++ b/arch/x86/include/asm/tables.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _X86_TABLES_H_
+#define _X86_TABLES_H_
+
+/*
+ * All x86 tables happen to like the address range from 0xf0000 to 0x100000.
+ * We use 0xf0000 as the starting address to store those tables, including
+ * PIRQ routing table, Multi-Processor table and ACPI table.
+ */
+#define ROM_TABLE_ADDR	0xf0000
+
+/**
+ * table_compute_checksum() - Compute a table checksum
+ *
+ * This computes an 8-bit checksum for the configuration table.
+ * All bytes in the configuration table, including checksum itself and
+ * reserved bytes must add up to zero.
+ *
+ * @v:		configuration table base address
+ * @len:	configuration table size
+ * @return:	the 8-bit checksum
+ */
+u8 table_compute_checksum(void *v, int len);
+
+/**
+ * write_tables() - Write x86 configuration tables
+ *
+ * This writes x86 configuration tables, including PIRQ routing table,
+ * Multi-Processor table and ACPI table. Whether a specific type of
+ * configuration table is written is controlled by a Kconfig option.
+ */
+void write_tables(void);
+
+/**
+ * write_pirq_routing_table() - Write PIRQ routing table
+ *
+ * This writes PIRQ routing table at a given address.
+ *
+ * @start:	start address to write PIRQ routing table
+ * @return:	end address of PIRQ routing table
+ */
+u32 write_pirq_routing_table(u32 start);
+
+#endif /* _X86_TABLES_H_ */