diff options
author | Heiko Schocher <hs@denx.de> | 2016-08-17 07:13:25 (GMT) |
---|---|---|
committer | Andreas Bießmann <andreas@biessmann.org> | 2016-10-28 16:37:13 (GMT) |
commit | 6ed67659b93f9b3190558845c20faea1447ae4ce (patch) | |
tree | a99f26ba1ab9bc7bc66ee7b7bc5f0f6857068e3b /arch | |
parent | 806a5a3958e4af483e529cf0db75464055d6e13a (diff) | |
download | u-boot-fsl-qoriq-6ed67659b93f9b3190558845c20faea1447ae4ce.tar.xz |
arm, at91: add icache support
add at least icache support for at91 based boards.
This speeds up NOR flash access on an at91sam9g15
based board from 15.2 seconds reading 8 MiB from
a SPI NOR flash to 5.7 seconds.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-at91/arm926ejs/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/mach-at91/arm926ejs/cache.c | 29 |
2 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/arm926ejs/Makefile b/arch/arm/mach-at91/arm926ejs/Makefile index ddc323f..d36e15a 100644 --- a/arch/arm/mach-at91/arm926ejs/Makefile +++ b/arch/arm/mach-at91/arm926ejs/Makefile @@ -18,6 +18,7 @@ obj-$(CONFIG_AT91SAM9N12) += at91sam9n12_devices.o obj-$(CONFIG_AT91SAM9X5) += at91sam9x5_devices.o obj-$(CONFIG_AT91_EFLASH) += eflash.o obj-$(CONFIG_AT91_LED) += led.o +obj-y += cache.o obj-y += clock.o obj-y += cpu.o obj-y += reset.o diff --git a/arch/arm/mach-at91/arm926ejs/cache.c b/arch/arm/mach-at91/arm926ejs/cache.c new file mode 100644 index 0000000..8813706 --- /dev/null +++ b/arch/arm/mach-at91/arm926ejs/cache.c @@ -0,0 +1,29 @@ +/* + * (C) Copyright 2016 + * Heiko Schocher, DENX Software Engineering, hs@denx.de. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include <linux/types.h> +#include <common.h> + +void enable_caches(void) +{ +#ifndef CONFIG_SYS_ICACHE_OFF + icache_enable(); +#endif +} + +#ifndef CONFIG_SYS_ICACHE_OFF +/* Invalidate entire I-cache and branch predictor array */ +void invalidate_icache_all(void) +{ + unsigned long i = 0; + + asm ("mcr p15, 0, %0, c7, c5, 0" : : "r" (i)); +} +#else +void invalidate_icache_all(void) +{ +} +#endif |