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| author | Fabio Estevam <fabio.estevam@freescale.com> | 2013-12-26 16:51:32 (GMT) |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2014-01-02 16:16:50 (GMT) |
| commit | 7e5e8c94a9dd6654285aff96e0ff45a353ed79fa (patch) | |
| tree | 6a036e8e1e7bdcf88c94198eafdc3016900cfaba /arch | |
| parent | e113fd1972aa921258e3219e6666bc41c9459503 (diff) | |
| download | u-boot-fsl-qoriq-7e5e8c94a9dd6654285aff96e0ff45a353ed79fa.tar.xz | |
mx6: soc: Set the VDDSOC at 1.175 V
mx6 datasheet specifies that the minimum VDDSOC at 792 MHz is 1.15 V.
Add a 25 mV margin and set it to 1.175V.
This also matches the VDDSOC voltages for 792MHz operation that the kernel configures:
http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/arch/arm/mach-mx6/cpu_op-mx6.c?h=imx_3.0.35_4.1.0
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/cpu/armv7/mx6/soc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index 486b870..3e095aa 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -151,7 +151,7 @@ int arch_cpu_init(void) { init_aips(); - set_vddsoc(1200); /* Set VDDSOC to 1.2V */ + set_vddsoc(1175); /* Set VDDSOC to 1.175V */ imx_set_wdog_powerdown(false); /* Disable PDE bit of WMCR register */ |